Non-volatile semiconductor memory featuring effective cell area

Static information storage and retrieval – Floating gate – Particular connection

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365 63, 36518511, 36518513, G11C 1600

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active

06064592&

ABSTRACT:
In order to achieve effective reduction of memory cell area in a contactless type non-volatile memory, the main bit lines ran zigzag in the column direction connecting the buried local bit lines in two adjacent columns of memory cell blocks alternately. This permits the number of main bit lines to be half, thereby reducing the pitch of the main bit lines with the result of reducing the memory cell area.

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patent: 5777922 (1998-07-01), Choi et al.
patent: 5825688 (1998-10-01), Ueki
patent: 5969977 (1999-10-01), Camerlenghi et al.

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