Method to form high efficiency GST cell using a double...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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C257S042000

Reexamination Certificate

active

07888166

ABSTRACT:
Embodiments of the present invention provide a method that includes providing wafer including multiple cells, each cell including at least one emitter. The method further includes performing a lithographic operation in a word line direction of the wafer across the cells to form pre-heater element arrangements, performing a lithographic operation in a bit line direction of the wafer across the pre-heater element arrangements to form a pre-heater element adjacent each emitter, and performing a lithographic operation in the word line direction across a portion of the pre-heater elements to form a heater element adjacent each emitter. Other embodiments are also described.

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patent: 1729355 (2006-06-01), None
Ottogalli F. et al.: “Phase-Change Memory Technology for Embedded Applications”, Solid-State Device Research Conference, 2004. ESSDERC 2004. Proceeding of the 34th European Leuven, Belguim Sep. 21-23, 2004, Piscataway, NJ, USA, IEEE, US, Sep. 21, 2004, pp. 293-296, XP010738434, ISBN: 978-0-7803-8478-1.
Priovano A. et al.: “μTrench Phase-Change Memory Cell Engineering and Optimization”, Solid-State Device Research Conference, 2005. ESSDERC 2005. Proceeding s of 35th European Sep. 12-16, 2005, Piscataway, NJ, USA, IEEE, Sep. 12, 2005, pp. 313-316, XP010858778, ISBN: 987-0-7803-9203-8.

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