Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2011-02-01
2011-02-01
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S786000, C257SE23063, C257SE23068, C257SE23172, C257SE23175
Reexamination Certificate
active
07880308
ABSTRACT:
There is disclosed a semiconductor device comprising at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being connected between the major surfaces, and a plurality of connecting portions being provided adjacent to each other while connected to each wiring on the major surfaces opposing each other, at least one of the connecting portions provided on the same major surface being formed smaller than the adjacent other connecting portion, the connecting portions being provided at positions opposing each other one to one on the major surface, the connecting portions being connected so that the wirings are connected between the major surfaces, one connecting portion of a pair of the connecting portions connected one to one being formed smaller than the other connecting portion.
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Notice of Reasons for Rejection mailed on Aug. 18, 2009, by the Japanese Patent Office in copending Application No. 2005-340233 and English language translation thereof.
Final Notice of Rejection of Feb. 2, 2010, by the Japanese Patent Office in copending Application No. 2005-340233 and English language translation thereof.
Sugizaki Yoshiaki
Yoshimura Atsushi
Cruz Leslie Pilar
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Tran Minh-Loan T
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