Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257SE21642, C257S392000, C257S501000, C257S773000, C438S348000, C438S361000

Reexamination Certificate

active

07868413

ABSTRACT:
It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.

REFERENCES:
patent: 6534819 (2003-03-01), Tiwari et al.
patent: 6657882 (2003-12-01), Takashima
patent: 6724046 (2004-04-01), Oyamatsu
patent: 6947830 (2005-09-01), Froloff et al.
patent: 7547871 (2009-06-01), Hiyama et al.
patent: 7652344 (2010-01-01), Uchida
patent: 7714606 (2010-05-01), Ozawa et al.
patent: 2004/0213123 (2004-10-01), Takahashi et al.
patent: 2006/0012003 (2006-01-01), Mallikarjunaswamy et al.
patent: 2006/0102980 (2006-05-01), Nakashiba
patent: 2006/0165341 (2006-07-01), Yan et al.
Hastings, Alan, “The Art of Analog Layout,” Second Edition, Prentice Hall (2006), pp. 173.

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