Multiplication circuit with field effect transistor (FET)

Details Multiplication circuit with field effect transistor (FET) Multiplication circuit with field effect transistor (FET)

1976-10-19

1978-07-11

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307251, 328160, H03K 1700

Patent

active

041004329

ABSTRACT:
A drain resistor is connected to a drain electrode of a Field Effect Transistor (FET). One of the input signals to be multiplied is applied to the drain electrode through the drain resistor. The other input signal to be multiplied is applied to a gate electrode of the FET. An output proportional to the product of two signals appears across a resistor connected between a source electrode of FET and ground. In such an arrangement the resistance value of the drain resistor is so determined that the gradient of the characteristics of the drain current to the one input signal becomes almost equal to that of the characteristics of the drain current to the other input signal.

REFERENCES:
patent: 3368066 (1968-02-01), Miller et al.
patent: 3544812 (1970-12-01), Riso
patent: 3757139 (1973-09-01), Hunter
patent: 4011503 (1977-03-01), Ferrara

Affiliated with

Also associated with

Rating

Multiplication circuit with field effect transistor (FET) does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiplication circuit with field effect transistor (FET), we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplication circuit with field effect transistor (FET) will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-264238