Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-05-31
2011-05-31
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S113000, C716S115000
Reexamination Certificate
active
07954076
ABSTRACT:
A transmission delay analyzing apparatus includes: a first acquisition section that acquires a noise waveform from among waveforms which propagate in a first transmission line and acquired by a receiving circuit;a first calculation section that calculates a noise peak level which is the peak level of the noise waveform acquired by the first acquisition section; a second acquisition section that acquires a signal waveform free from noise from among the waveforms which propagate in the first transmission line and acquired by the receiving circuit; and a second calculation section that calculates a delay variation of a transmitted signal based on the signal waveform acquired by the second acquisition section, a threshold for determining the level of a signal that the receiving circuit has received from the first transmission line, and the noise peak level calculated by the first calculation section.
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Dinh Paul
Fujitsu Limited
Ngo Brian
Westerman Hattori Daniels & Adrian LLP
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