Sector configure registers for a flash device generating...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185330, C365S185030, C365S218000, C365S082000

Reexamination Certificate

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07864596

ABSTRACT:
Flash memory systems and methodologies are provided for providing multiple virtual ground decoding schemes in a flash device. The flash device can include sector configure registers for selecting a specific ground scheme at sector level. The sector configure registers can select a decoding scheme from multiple virtual ground decoding schemes including a conventional dual bit decoding scheme and a single program and erase entity decoding scheme. Since the single program and erase entity decoding scheme can emulate EEPROM functionality in a flash device, the combination of the conventional dual bit decoding scheme and the single program and erase entity decoding scheme can provide both dual bit high density storage and EEPROM emulation in a single flash device.

REFERENCES:
patent: 2005/0276120 (2005-12-01), Hsia et al.
patent: 2006/0163645 (2006-07-01), Guterman et al.
patent: 2007/0247924 (2007-10-01), Zheng et al.
patent: 2008/0025089 (2008-01-01), Scheuerlein et al.
patent: 2008/0080238 (2008-04-01), Yuda
patent: 2008/0151644 (2008-06-01), Park et al.

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