System scan path architecture

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371 221, G01R 3128

Patent

active

050560930

ABSTRACT:
A system scan path architecture is provided by a device select module (DSM) (18) which may be used in conjunction with associated circuits (16a-b) to select secondary scan paths (PATH1-m) on each circuit for coupling with a primary scan path on a test bus (14). The test bus (14) is controlled by a primary bus master (12). Remote bus masters (124) may be used in conjunction with the DSMs (18) to provide serial-scan testing independent of the primary bus master (12).

REFERENCES:
patent: 4494066 (1985-01-01), Goel et al.
patent: 4710931 (1987-12-01), Bellay et al.
patent: 4872169 (1989-10-01), Whetsel

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