Semiconductor device with three-dimensional field effect...

Details Semiconductor device with three-dimensional field effect... Semiconductor device with three-dimensional field effect...

2011-08-02

2011-08-02

Smoot, Stephen W (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C257S351000, C257S369000, C257S401000, C257SE29275

Reexamination Certificate

active

07989846

ABSTRACT:
The semiconductor device includes first and second common source semiconductor layers respectively extending in a first direction, first and second logic gate circuits respectively composed of at least one three-dimensional P-type FET and a three-dimensional N-type FET. The sources of the three-dimensional P-type FETs in the first and second logic gate circuits are joined to the first common source semiconductor layer. The sources of the three-dimensional N-type FETs in the first and second logic gate circuits are joined to the second common source semiconductor layer. The semiconductor layers of the three-dimensional P-type and N-type FETs in the first logic gate circuit are joined in their drain side, and The semiconductor layers of the three-dimensional P-type and N-type FETs in the second logic gate circuit are joined in their drain side. The dissipation of the FinFET can be improved.

REFERENCES:
patent: 7112858 (2006-09-01), Inaba et al.
patent: 2004/0031004 (2004-02-01), Yoshioka
patent: 2004/0144979 (2004-07-01), Bhattacharyya
patent: 2004/0238894 (2004-12-01), Furuta
patent: 2005/0205938 (2005-09-01), Yagishita
patent: 2004-072017 (2004-03-01), None
patent: 2004-363136 (2004-12-01), None
patent: 2005-116969 (2005-04-01), None
patent: 2005-197462 (2005-07-01), None
patent: 2006-019578 (2006-01-01), None
Z. Guo et al., “FinFET-Based SRAM Design,” International Symposium on Low Power Electronics and Design, 2005, pp. 2-7.

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