Method, apparatus and computer program product for eliminating e

Computer graphics processing and selective visual display system – Computer graphic processing system – Interface

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707104, G06F 1300

Patent

active

060644087

ABSTRACT:
Apparatus, methods, and computer program products are disclosed for reducing the overhead associated with performing area-image operations on a tiled image. The invention detects when an area-image operation, that uses a source pixel contribution map, requires pixel values from one or more adjacent tiles. The invention also generates a list of boxes that represent pixel image information. These boxes are split with respect to the image edges and the tile edges within the image. The split boxes are used to direct memory buffer allocation for cobbled portions of the image and to leave the majority of the tile's pixel information to be operated on within memory buffer holding the tile. Thus, the invention provides a mechanism to assemble image data that crosses tile edges without copying major portions of the tile from one memory buffer to another. Additionally, each resulting box represents sufficient pixel values such that existing image processing techniques currently are applied to area-image operations can also be applied to tiled images. Thus, box can be processed by an MMX-like instruction or image hardware accelerator.

REFERENCES:
patent: 5263136 (1993-11-01), DeAguiar et al.
patent: 5461706 (1995-10-01), Trow et al.
"Appendix C Alphabetical List of IA MMX.TM. Instruction Set Mnemonics," Internet address: http://134.134.214.1/drg/mmx/manuals/prm/prm.sub.-- appc.htm (published prior to the filing of the application) 1-3.
"Intel Architecture MMX.TM. Instruction Set," Internet address: http://developer.intel.com/drg/mmx/Manuals/prm/PRM.sub.-- CHP5.HTM (published prior to the filing of the application) 1-33.
"The VIS.TM. Instruction Set," Internet address: http://www.sun.com/microelectronics/vis/ (published prior to the filing of the application) 1-3.
"The Visual Instruction Set (VIS.TM.): On Chip Support for New-Media Processing," Internet address: http://www.sun.com/microelectronics/whitepapers/wp95-022/ (published prior to the filing of the application) 1-9.
Sun Microsystems VIS.TM. Instruction Set User's Manual, 1-136, (Jul. 1997).
"Why is a PC not a Workstation? Because it is VIS.TM.-ually impaired," Internet address: http://search.sun.com/query.html?col=service&col=sun&col=swol&col=wwwwest& qp=&qt=VIS&qs=&qc=&pw=455&ws=0&qm=0&st=1&nh=10&lk=1&rf=0&oq=&rq=0 (published prior to the filing of the application) 1-3.

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