Methods of fabricating P-I-N diodes, structures for P-I-N...

Details Methods of fabricating P-I-N diodes, structures for P-I-N... Methods of fabricating P-I-N diodes, structures for P-I-N...

2011-04-05

2011-04-05

Sefer, A. (Department: 2893)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S702000, C257S656000, C257SE21545

Reexamination Certificate

active

07919347

ABSTRACT:
Methods of fabricating P-I-N diodes, structures for P-I-N diodes and design structure for P-I-N diodes. A method includes: forming a trench in a silicon substrate; forming a doped region in the substrate abutting the trench; growing an intrinsic epitaxial silicon layer on surfaces of the trench; depositing a doped polysilicon layer to fill remaining space in the trench, performing a chemical mechanical polish so top surfaces of the intrinsic epitaxial silicon layer and the doped polysilicon layer are coplanar; forming a dielectric isolation layer in the substrate; forming a dielectric layer on top of the isolation layer; and forming a first metal contact to the doped polysilicon layer through the dielectric layer and a second contact to the doped region the dielectric and through the isolation layer.

REFERENCES:
patent: 6451702 (2002-09-01), Yang et al.
patent: 6538299 (2003-03-01), Kwark et al.
patent: 6667528 (2003-12-01), Cohen et al.
patent: 2005/0133723 (2005-06-01), Lee et al.
patent: 2006/0286751 (2006-12-01), Urakami et al.
patent: 2007/0077725 (2007-04-01), Wilson et al.
patent: 2008/0185691 (2008-08-01), Cheng et al.

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