Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2011-05-31
2011-05-31
Williams, Alexander O (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257SE23061, C257S786000, C257S784000, C257S668000, C257S680000, C257S684000, C324S538000
Reexamination Certificate
active
07952186
ABSTRACT:
A semiconductor package includes a bare chip which has a plurality of external electrodes, a land grid array substrate having an edge, a first surface and a second surface. The first surface includes a first portion apart from the edge and a second portion adjacent to the edge. The first portion of the first surface mounts the bare chip and is covered with a resin to seal the bare chip with the resin. The first portion of the first surface and the second surface includes a non-sealed region which is not covered with the resin. A plurality of first electrodes are arranged on the non-sealed region and connected to the external electrodes and a plurality of second electrodes are arranged on the second surface and connected to the external electrodes.
REFERENCES:
patent: 2005/0017740 (2005-01-01), Higashitani et al.
patent: 2007/0108583 (2007-05-01), Shim et al.
patent: 60-200537 (1985-10-01), None
patent: 2001-217054 (2001-08-01), None
patent: 2005-302871 (2005-10-01), None
patent: 2008-235434 (2008-10-01), None
McGinn IP Law Group PLLC
Renesas Electronics Corporation
Williams Alexander O
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