Semiconductor device with improved pads

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257SE21649, C257S774000, C257S306000, C438S622000

Reexamination Certificate

active

07969008

ABSTRACT:
A semiconductor device has: a circuit portion having semiconductor elements formed on a semiconductor substrate; insulating lamination formed above the semiconductor substrate and covering the circuit portion; a multilevel wiring structure formed in the insulating lamination and including wiring patterns and via conductors; and a pad electrode structure formed above the semiconductor substrate and connected to the multilevel wiring structure. The pad electrode structure includes pad wiring patterns and pad via conductors interconnecting the pad wiring patterns, the uppermost pad wiring pattern includes a pad pattern and a sealing pattern surrounding the pad pattern in a loop shape. Another pad wiring pattern has continuous extended pad pattern of a size overlapping the sealing pattern. The pad via conductors include a plurality of columnar via conductors disposed in register with the pad pattern and a loop-shaped wall portion disposed in register with the sealing pattern.

REFERENCES:
patent: 6455882 (2002-09-01), Nakura
patent: 6492222 (2002-12-01), Xing
patent: 2002/0125577 (2002-09-01), Komada
patent: 2003/0102500 (2003-06-01), Cross
patent: 2004/0150070 (2004-08-01), Okada et al.
patent: 2005/0082577 (2005-04-01), Usui
patent: 2005/0127395 (2005-06-01), Saigoh et al.
patent: 2002-270608 (2002-09-01), None
patent: 2002-289689 (2002-10-01), None
patent: 2003-174146 (2003-06-01), None
patent: 2004-134450 (2004-04-01), None
patent: 2004-297022 (2004-10-01), None
patent: 2005-142553 (2005-06-01), None
patent: 2005-175204 (2005-06-01), None
International Search Report of PCT/JP2005/023965, date of mailing Apr. 18, 2006.

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