Method of transistor level heterogeneous integration and system

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21603, C257SE27012, C438S689000

Reexamination Certificate

active

07875952

ABSTRACT:
The present invention relates to a process for fabricating integrated circuit system. More particularly, the process allows for fabrication of highly integrated system-on-a-chip modules through heterogeneous integration of different semiconductor technologies wherein alignment targets on the base semiconductor are used for precise lateral positioning of device structures above.

REFERENCES:
patent: 4912844 (1990-04-01), Parker
patent: 5161093 (1992-11-01), Gorczyca
patent: 5284548 (1994-02-01), Carey
patent: 5353498 (1994-10-01), Fillion
patent: 5485038 (1996-01-01), Licari
patent: 5545291 (1996-08-01), Smith
patent: 5609907 (1997-03-01), Natan
patent: 5751018 (1998-05-01), Alivisatos
patent: 5772905 (1998-06-01), Chou
patent: 5783856 (1998-07-01), Smith
patent: 5824186 (1998-10-01), Smith
patent: 5877550 (1999-03-01), Suzuki
patent: 5904545 (1999-05-01), Smith
patent: 6037255 (2000-03-01), Hussein
patent: 6096386 (2000-08-01), Biebuyck
patent: 6165911 (2000-12-01), Calveley
patent: 6294741 (2001-09-01), Cole
patent: 6326058 (2001-12-01), Biebuyck
patent: 6579463 (2003-06-01), Winningham
patent: 6586338 (2003-07-01), Smith
patent: 6656568 (2003-12-01), Winningham
patent: 6946322 (2005-09-01), Brewer
patent: 6974604 (2005-12-01), Hunter
patent: 7045195 (2006-05-01), Ozin
patent: 7223635 (2007-05-01), Brewer
patent: 2002/0005294 (2002-01-01), Mayer et al.
patent: 2003/0140317 (2003-07-01), Brewer et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of transistor level heterogeneous integration and system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of transistor level heterogeneous integration and system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of transistor level heterogeneous integration and system will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2620921

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.