Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2011-05-24
2011-05-24
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189080, C365S185230
Reexamination Certificate
active
07948823
ABSTRACT:
A semiconductor memory device having a plurality of cell blocks includes: a block decoding unit configured to decode an input address for selecting a corresponding cell block to generate a block selection signal; a block information address generating unit configured to perform a logic operation on the block selection signal and an assignment address for selecting a word line to be activated within the corresponding cell block to generate a block information address activated only when the corresponding cell block is selected; and a word line driving unit configured to select a word line in response to the block information address.
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Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Dec. 9, 2009.
Notice of Allowance issued from Korean Intellectual Property Office on Jun. 3, 2010.
Lee Kang-Seol
Yun Tae-Sik
Dinh Son T
Hynix / Semiconductor Inc.
IP & T Group LLP
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