System with plurality of processing elememts each generates resp

Details System with plurality of processing elememts each generates resp System with plurality of processing elememts each generates resp

1990-10-09

1991-10-08

Lee, Thomas C.

Boots, shoes, and leggings

3642287, 364229, 3642319, 3642381, 364261, 3642611, 364736, 382 41, G06F 1580

Patent

active

050559974

ABSTRACT:
A data processor system having at least one arithmetic/logic processor element and at least one memory processor element which can be coupled in circuit using a crossbar switch. The arithmetic/logic processor element is provided with an ALU and a program memory. The ALU has an input for instructions. The instructions can be made up of data from the program memory and data from the crossbar switch via a channel specifically present for the purpose.

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Annaratone et al. "Warp Architecture and Implementation", 13th Annual Symposium on Computer Architecture, Jun. 1986, Tokyo.

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