Device structure for providing improved Schottky barrier...

Active solid-state devices (e.g. – transistors – solid-state diode – Schottky barrier

Reexamination Certificate

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C257S473000, C257S475000

Reexamination Certificate

active

06184563

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the structure and fabrication process of a Schottky barrier rectifier. More particularly, this invention relates to a novel Schottky device structure and fabrication process where a requirement of p-ring is eliminated and meanwhile the forward current is enhanced and the reverse breakdown voltage is improved.
2. Description of the Prior Art
Conventional rectifier with a Schottky barrier configuration is limited by the technical difficulties of low efficiency, low switching speed, and low reverse breakdown voltage. These difficulties hinders practical applications of the Schottky rectifiers in modern electronic devices when the operational voltage drops from twelve volts to five volts and further down to three volts and lower voltages when the technology moving toward quarter micron feature size and beyond.
FIG. 1
shows a cross sectional view of a conventional Schottky barrier rectifier
10
. An N-layer
20
is supported on a N+ substrate
15
. In the N-layer
20
a p-ring
25
is formed to eliminate the sharp edge effects between the metal layers
30
and the top surface above the N-layer. The requirement to form the P-ring
25
in the N-layer
20
is to prevent a reverse breakdown due to the sharp edges formed between the metal layer
30
and the top surface of the N-layer
20
. However, due to the requirement of providing the p-ring
25
, the thickness of the N-layer is limited. The forward voltage V
f
and the forward current I
f
are limited. Additionally, due to the p-n junction formed between the P-ring
25
and the N-layer
20
, the switching speed of the Schottky rectifier is adversely affected.
In U.S. Pat. No. 5,686,753, entitled “Schottky Barrier Diode having a Mesa Structure” Miyata el al. disclose a Schottky barrier diode as that shown in FIG.
2
. It includes a compound semiconductor substrate having an N+ layer and an N− layer with the N− layer supported on the N+ layer. The N− layer is configured in a form of a mesa, which has a skirt portion and a slant portion. The diode further includes an insulation layer formed on the skirt portion and the slant portion of the mesa. An anode is formed on the insulation layer and the N− layer. A cathode is formed on the N+ layer. Even with a mesa shape, Miyata's Schottky barrier diode still faced with the problem of sharp edge effect between the anode layer and the N− layer. A reverse breakdown problem would hinder practical application of the device as disclosed in the patent.
Therefore, a need still exits in the art of design and fabrication of the Schottky rectifiers, particularly for low voltage rectifiers, to provide a structure and fabrication process that would resolve these difficulties. More specifically, it is preferably that a Schottky rectifier with a high efficiency can be produced with effective prevention against reverse breakdown without causing a slow down of the switching speed. It is further desirable to employ a simplified manufacture process to reduce the production costs such that a high quality high performance Schottky rectifier can be economically applied.
SUMMARY OF THE PRESENT INVENTION
It is therefore an object of the present invention to provide a new Schottky barrier rectifier with novel structure manufactured by improved fabrication process for eliminating the sharp edge effects between the metal and the top surface of a semiconductor without requiring a P-ring. By placing the edge of the metal layer on top of an insulation layer, the technical difficulty caused by edge effects between the metal semiconductor interface is resolved. The performance characteristics of the Schottky barrier rectifier are improved such that aforementioned limitations and difficulties as encountered in the prior art can be overcome.
Specifically, it is an object of the present invention to provide a new Schottky barrier rectifier with novel structure manufactured by improved fabrication process by placing the edges of a metal anode layer on a trench filled with insulation material. The edge effects are eliminated without requiring the P-rings such that the difficulties arising from the P-ring requirement can be resolved. Schottky rectifiers of higher efficiency can be provided with improved forward current and forward resistance while the premature reverse breakdown is effectively prevented.
Another object of the present invention is to provide a new Schottky barrier rectifier with novel structure manufactured by improved fabrication process by placing the edges of a metal anode layer on a trench filled with insulation material. The edge effects are eliminated without requiring the P-rings such that the difficulties arising from the P-ring requirement can be resolved and the switching speed of the Schottky rectifiers is improved.
Another object of the present invention is to provide a new Schottky barrier rectifier with novel structure manufactured by improved fabrication process by placing the edges of a metal anode layer on a trench filled with insulation material. The edge effects are eliminated without requiring the P-rings because the field build-up at the edges of the metal semiconductor contacts is eliminated. Further improvement is achieved by providing a charge suppression film layer of high resistance formed right on top of the semiconductor such that the reverse breakdown voltage is further improved.
Another object of the present invention is to provide a new Schottky barrier rectifier with novel structure manufactured by improved fabrication process. Specifically, a thin nitride film layer is provided below the metal anode contact layer to improve the reliability by preventing sodium and other contaminants from entering into the rectifier.
Briefly, in a preferred embodiment, the present invention discloses a Schottky barrier rectifier formed in a semiconductor chip of a first conductivity type having a cathode electrode connected thereto near a bottom surface of the semiconductor chip. The Schottky rectifier further includes an epitaxial layer of the first conductivity type of a reduced doping concentration than the semiconductor chip near a top surface of the semiconductor chip. The Schottky rectifier further includes a trench opened from the top surface disposed near peripheral edges of the semiconductor chip filled with an electrical insulation material therein. The Schottky rectifier further includes an anode electrode defined by a conductive layer disposed on top over the epitaxial layer wherein the conductive layer having all peripheral edges disposed on top of the electrical insulation material filling the trench. In a preferred embodiment, the conductive layer having peripheral edges along with inner edges of the trench.
The present invention further discloses a method for fabricating a Schottky rectifier on a semiconductor chip of a first conductivity provided for connecting to a cathode electrode. The method includes the steps of (a) forming an epitaxial layer of a first conductivity type of a reduced doping concentration than the semiconductor chip; (b) applying a trench mask for etching a trench from a top surface of the semiconductor chip near peripheral edges of the semiconductor chip; (c) filling the trench with an electrical insulation material then removing the electrical insulation material from the top surface of the semiconductor chip; and (d) forming a conductive layer over the top surface and patterning the conductive layer into an anode electrode with all edges of the conductive layer disposed on top of the trench filled with the electrical insulation material.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment which is illustrated in the various drawing figures.


REFERENCES:
patent: 5101244 (1992-03-01), Mori et al.
patent: 5612567 (1997-03-01), Baliga
patent: 404065876 (1992-0

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