Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
Reexamination Certificate
2000-05-03
2001-11-13
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Particular stable state circuit
C327S067000, C327S087000
Reexamination Certificate
active
06316978
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains to comparators whose threshold potentials are independent of process and temperature variations. In preferred embodiments, the invention is a comparator whose hysteresis characteristics and threshold potentials are independent of process, temperature, and supply voltage variations, and depend only on a reference potential and on ratios of resistances of pairs of resistors.
2. Description of the Related Art
FIG. 1
is a schematic diagram of a conventional comparator circuit, which is typically implemented as an integrated circuit (or portion of an integrated circuit). In
FIG. 1
, voltage source
6
maintains the inverting input of comparator
8
at reference voltage V
ref
above ground. Resistor R
3
is connected between the output and noninverting input of comparator
8
. Resistor R
1
is connected between the circuit's input node (which is maintained at input potential V
in
) and comparator
8
's noninverting input, and resistor R
2
is connected between comparator
8
's noninverting input and ground.
Comparator
8
has two states: a first state (in which its output potential V
o
has a first value V
o
=V
oL
), which it enters when the potential at it's noninverting input falls below a first threshold potential; and a second state (in which its output potential V
o
has a second value V
o
=V
oH
), which it enters when the potential at it's noninverting input rises to a second threshold potential. The
FIG. 1
circuit is subject to hysteresis in the sense that the first threshold potential differs from the second threshold potential. Specifically, the second threshold potential is:
V
LH
=V
in
=V
ref
(1+
R
1
/
R
2
+
R
1
/
R
3
)−
V
oL
(
R
1
/
R
3
);
and the first threshold potential is:
V
HL
=V
in
=V
ref
(1+
R
1
/
R
2
+
R
1
/
R
3
)−
V
oH
(
R
1
/
R
3
).
Since the threshold potentials V
LH
and V
HL
depend on comparator
8
's output potential (which is either V
oH
or V
oL
), they typically depend on process variations (which occur during manufacture of the
FIG. 1
circuit), temperature variations (which occur during operation of the
FIG. 1
circuit), and variations in the supply potential (potential V
s
provided to comparator
8
). The hysteresis characteristics of the
FIG. 1
circuit similarly depend on comparator
8
's output potential (V
oH
or V
oL
), and thus also typically depends on process, temperature, and supply potential variations. It is impractical (and very difficult) to design an implementation of the
FIG. 1
circuit in which neither the threshold potentials nor the hysteresis characteristics depend on process, temperature, or supply potential variations.
SUMMARY OF THE INVENTION
In a class of embodiments, the invention is a comparator circuit having a first state and a second state, a threshold potential for transition from the first state to the second state, another threshold potential for transition from the second state to the first state, and hysteresis characteristics that are independent of process, temperature, and supply voltage variations. In preferred embodiments, the threshold potentials and hysteresis characteristics depend only on a reference potential asserted to the circuit and on ratios of resistances of pairs of resistors of the circuit. In some of the preferred embodiments, the circuit asserts an output signal in response to an input potential and the reference potential, and includes a comparator (having an output which asserts a binary output signal, and two comparator inputs) and additional circuitry coupled to the comparator inputs and coupled to receive the input potential, wherein the additional circuitry includes a set of resistors and a current source, the current source is coupled to the output and configured to draw a first current when the output signal has its first value and to draw a second current when the output signal has its second value, the current source includes a second set of resistors and is coupled to receive the reference potential, and the current source is implemented so that each of the first current and the second current is independent of all parameters other than the reference potential and a resistance of each resistor of the second set of resistors.
In a first class of embodiments, the inventive circuit is coupled to receive an input potential, and configured to enter a first state (in which it asserts an output signal having a first value) in response to the input potential undergoing a transition in a first direction (a first one of a rising direction and a falling direction) to a first threshold potential, and to enter a second state (in which it asserts an output signal having a second value) in response to the input potential undergoing a transition in the opposite direction (the other one of the rising direction and the falling direction) to a second threshold potential. The circuit includes a comparator having a comparator output (at which the output signal is asserted) and two comparator inputs, and additional circuitry coupled to the comparator inputs and coupled to receive the input potential, wherein the additional circuitry includes a set of resistors and a current source, and the current source is coupled to the comparator output and configured to draw a first current when the output signal has the first value and to draw a second current when the output signal has the second value. In some of the embodiments in the first class, the first current is a nonzero current and the second current is zero (the first current has a nonzero amplitude and the second current has zero amplitude). In preferred ones of the first class of embodiments, the current source includes a second set of resistors and is coupled to receive a reference potential, and the current source is implemented so that the first current depends only on the reference potential and on a resistance of each resistor of the second set of resistors. In some of the preferred embodiments, the current source comprises a switch coupled to receive a signal indicative of the value of the inventive circuit's output signal, and current source circuitry having a first node coupled to the switch, wherein the current source circuitry includes the second set of resistors, at least one transistor coupled to the second set of resistors, a second node coupled to receive the reference potential, and a third node (coupled to said at least one transistor), wherein the current source circuitry has a first state in which said current source circuitry draws the first current from the third node and a second state in which said current source circuitry draws the second current from said third node.
In some of the first class of embodiments, the comparator inputs include a noninverting input and an inverting input, the additional circuitry includes a reference potential source, the set of resistors has a first node coupled to receive the input potential, a second node coupled to the current source, and a third node coupled to the noninverting input, and the reference potential source is coupled to the inverting input (so as to maintain the inverting input at a reference potential). In other ones of the first class of embodiments, the comparator inputs include a noninverting input and an inverting input, the additional circuitry includes first circuitry and second circuitry, the first circuitry includes a first subset of the set of resistors and has a first node coupled to receive the input potential and a second node coupled to the inverting input, the second circuitry includes a reference potential source, the current source, and a second subset of the set of resistors coupled between the reference potential source and the noninverting input, wherein the current source is also coupled to the noninverting input.
REFERENCES:
patent: 4527076 (1985-07-01), Matsuo
patent: 4926068 (1990-05-01), Fujita
patent: 5266884 (1993-11-01), Agiman
patent: 5319265 (1994-06-01), Lim
p
Callahan Timothy P.
Girard & Equitz LLP
National Semiconductor Corporation
Nguyen Hai L.
LandOfFree
Comparator with process and temperature insensitive... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Comparator with process and temperature insensitive..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Comparator with process and temperature insensitive... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2607662