Internal voltage generator

Details Internal voltage generator Internal voltage generator

1999-11-05

2001-02-27

Wong, Peter S. (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C323S312000, C323S313000, C327S535000

Reexamination Certificate

active

06194887

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an internal voltage generator which supplies a predetermined voltage different from an external power supply voltage externally supplied thereto to an internal circuit of a semiconductor integrated circuit.
2. Description of the Related Art
A semiconductor integrated circuit device such as a semiconductor memory device in recent years does not use external power supply voltage V
CC
externally supplied thereto as it is, but lowers or raises it to produce a predetermined internal power supply voltage and supplies it to an internal circuit, by which the voltage is required, to achieve reduction of the power consumption and augmentation of the reliability of a device.
In a semiconductor memory device, for example, the sizes of transistors and other elements are reduced in order to increase the storage capacity or raise the access speed. However, since such reduction of the sizes of transistors and other elements makes it impossible to apply a high voltage to the transistors, a lowered voltage power supply circuit is provided in the semiconductor memory device to apply a lowered voltage lower than the external power supply voltage to the transistors.
Meanwhile, to word lines of a semiconductor memory device such as a DRAM (Dynamic RAM) or a non-volatile memory, a raised voltage must be applied which is higher than an external power supply voltage externally supplied thereto in order to secure a desired performance. Further, in a DRAM or some other device, a semiconductor substrate is sometimes biased to a negative voltage in order to secure a high charge holding characteristic. In this manner, a semiconductor memory device is required to include therein an internal voltage generator which generates various internal power supply voltages.
A conventional lowered voltage power supply circuit shown in
FIG. 1
includes output transistor
101
formed from a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) for supplying a lowered voltage to an internal circuit which serves as a load, differential amplifier
102
for outputting a control voltage to control the gate voltage of output transistor
101
, reference voltage generator
103
for supplying predetermined reference voltage V
REF
to differential amplifier
102
, and phase compensating capacitor
104
interposed between an output contact of output transistor
101
and the ground potential for preventing oscillation. External power supply voltage V
CC
is supplied to output transistor
101
and differential amplifier
102
.
Differential amplifier
102
includes transistors Q
1
, Q
2
formed from P-channel MOSFETs having the gates connected commonly, transistors Q
3
, Q
4
formed from N-channel MOSFETs connected in series to transistors Q
1
, Q
2
, respectively, and having the sources connected commonly, and current source
5
for supplying predetermined current to transistors Q
1
to Q
4
. The gate and the drain of transistor Q
2
are connected to each other so that transistors Q
1
, Q
2
form a current mirror circuit and operate so as to make the current flowing between the gate and the drain of transistor Q
1
and the current flowing between the gate and the drain of transistor Q
2
equal to each other.
Reference voltage V
REF
is applied to the gate of transistor Q
3
, which serves as inverted input terminal
106
of differential amplifier
102
, and the drain voltage of transistor Q
3
which is as an output of differential amplifier
102
is applied to the gate of output transistor
101
. Output voltage V
INT
(lowered voltage) output from the drain of output transistor
101
is fed back to the gate of transistor Q
4
which serves as non-inverted input terminal
107
of differential amplifier
102
.
In the lowered voltage power supply circuit having the construction described above, when output voltage V
INT
is lower than reference voltage V
REF
, for example, the voltage at node B of differential amplifier
102
rises while the voltage at node A lowers. Consequently, source-gate voltage V
GS
of output transistor
101
rises, and the lowered voltage power supply circuit operates in a direction in which it raises output voltage V
INT
. On the other hand, when output voltage V
INT
is higher than reference voltage V
REF
, since the voltage at node B of differential amplifier
102
lowers and the voltage at node A rises, source-gate voltage V
GS
of output transistor
101
lowers, and the lowered voltage power supply circuit operates in the other direction in which it lowers output voltage V
INT
. In other words, the lowered voltage power supply circuit shown in
FIG. 1
controls so that output voltage V
INT
may become equal to reference voltage V
REF
.
Reference voltage generator
103
of the lowered voltage power supply circuit shown in
FIG. 1
will be described in detail below with reference to the drawings.
Referring to
FIG. 2
, the conventional reference voltage generator includes, similarly to the lowered voltage power supply circuit shown in
FIG. 1
, output transistor
111
formed from a P-channel MOSFET for supplying reference voltage V
REF
to a load, differential amplifier
112
for outputting a control voltage to control the gate voltage of output transistor
111
, phase compensating capacitor
114
interposed between an output contact of output transistor
111
and the ground potential for preventing oscillation, and trimming resistors R
101
, R
102
serving as a voltage divider for dividing reference voltage V
REF
output from output transistor
111
at a predetermined ratio. External power supply voltage V
CC
is supplied to output transistor
111
and differential amplifier
112
.
To non-inverted input terminal
117
of differential amplifier
112
, a voltage obtained by dividing the output voltage of output transistor
111
by trimming resistors R
101
, R
102
. Thereupon, reference voltage V
REF
which depends upon comparison voltage V
R
applied to inverted input terminal
116
and a resistance ratio of trimming resistors R
101
, R
102
as given by expression (1) given below is outputted from output transistor
111
:
V
REF
=V
R
×(R
101
+R
102
)/R
102
  (1)
Comparison voltage V
R
applied to inverted input terminal
116
of differential amplifier
112
shown in
FIG. 2
is supplied from such a circuit as shown in-
FIG. 3
, for example.
Referring to
FIG. 3
, the generator of comparison voltage V
R
includes two transistors Q
5
, Q
6
formed from N-channel MOSFETs having threshold voltages different from each other and outputs a difference voltage between threshold voltages V
T
of transistors Q
5
, Q
6
as comparison voltage V
R
.
In the generator of comparison voltage V
R
having the construction described, even if threshold voltages VT of transistors Q
5
, Q
6
are varied by a variation of the ambient temperature, the variation of comparison voltage V
R
can be suppressed to a low value by selectively determining the sizes of transistors Q
5
, Q
6
and the resistance values of resistors R
103
, R
104
so that the voltage variations of threshold voltages V
T
offset each other.
If very small amplitude signal IN of a low frequency which corresponds to a disturbance is input to non-inverted input terminal
107
of differential amplifier
102
of the conventional lowered voltage power supply circuit shown in
FIG. 1
, then a signal having the same phase as input signal IN but having an amplified amplitude is output to node A which serves as an output of differential amplifier
102
as seen in FIG.
4
. Here, however, it is assumed that lower output voltage V
INT
is disconnected from non-inverted input terminal
107
in order to facilitate understandings. At this time, signal V
INT
having a polarity opposite to that of input signal IN but having an amplitude further amplified than that at node A is output to the drain of output transistor
101
. It is to be noted that the amplitude ratio between input signal IN and the signal appearing at node A is gain G
01
of differential amplifier

Affiliated with

Also associated with

Rating

Internal voltage generator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Internal voltage generator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Internal voltage generator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2606778