Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1998-06-24
2001-02-27
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S633000, C438S693000
Reexamination Certificate
active
06194317
ABSTRACT:
BACKGROUND
This invention relates generally to a method of modifying exposed surfaces of wafers suited for semiconductor fabrication and particularly to a method of modifying exposed surfaces of structured wafers suited for semiconductor fabrication using an abrasive article.
During integrated circuit manufacture, semiconductor wafers used in semiconductor fabrication typically undergo numerous processing steps, including deposition, patterning, and etching steps. Details of these manufacturing steps for semiconductor wafers are reported by Tonshoff et al., “Abrasive Machining of Silicon”, published in the
Annals of the International Institution for Production Engineering Research
, (Volume 39/2/1990), pp. 621-635. In each manufacturing step, it is often necessary or desirable to modify or refine an exposed surface of the wafer in order to prepare the wafer for subsequent fabrication or manufacturing steps.
For example, after a deposition step, the deposited material or layer on a wafer surface generally needs further processing before additional deposition or subsequent processing occurs. In another example, after an etching step, there is often a need to deposit either, or both, conducting or insulating materials in layers on the etched surface areas of a wafer. A specific example of this process is used in metal Damascene processes.
In the Damascene process, a pattern is etched into an oxide dielectric layer. After etching, optional adhesion/barrier layers are deposited over the entire surface and then a metal is deposited over or on top of the adhesion/barrier layers. The deposited metal layer is then modified, refined or finished by removing the deposited metal and regions of the adhesion/barrier layer on the surface. Typically, enough surface metal is removed so that the outer exposed surface of the wafer comprises both metal and an oxide dielectric material. A top view of the exposed wafer surface would reveal a planar surface with metal corresponding to the etched pattern and dielectric material adjacent to the metal. The metal(s) and oxide dielectric material(s) located on the modified surface of the wafer inherently have different physical characteristics, such as different hardness values. An abrasive article used to modify a wafer produced by the Damascene process must be carefully designed so as to simultaneously modify the materials without scratching the surface of either material. Further, the abrasive article must be able to create a planar outer exposed surface on a wafer having an exposed area of a metal and an exposed area of a dielectric material.
Such a process of modifying the deposited metal layer until the oxide dielectric material is exposed on the wafer outer surface leaves little margin for error because of the submicron dimensions of the metal features located on the wafer surface. It is clear that the removal rate of the deposited metal must be fast to minimize manufacturing costs. Further, metal removal from areas which were not etched must be complete. Still further, metal remaining in etched areas must be limited to discrete areas or zones. Yet further, the remaining metal must be continuous within an area or zone to ensure proper conductivity. In short. the metal modification process must be uniform, controlled, and reproducible on a submicron scale.
One conventional method of modifying or refining exposed surfaces of wafers employs methods that treat a wafer surface with a slurry containing a plurality of loose abrasive particles dispersed in a liquid. Typically this slurry is applied to a polishing pad and the wafer surface is then ground or moved against the pad in order to remove or take off material on the wafer surface. Generally, the slurry also contains agents which chemically react with the wafer surface. This type of process is commonly referred to as a chemical-mechanical planarization (CMP) process.
One problem with CMP slurries, however, is that the process must be carefully monitored in order to achieve a desired wafer surface topography. A second problem is the mess associated with loose abrasive slurries. Another problem is that the slurries generate a large number of particles which must be removed from the surface of the wafer and disposed of following wafer treatment. Handling and disposal of these slurries generates additional processing costs for the semiconductor wafer fabricator.
A recent alternative to CMP slurry methods uses an abrasive article to modify or refine a semiconductor surface. This alternative CMP process is reported in International Publication No. WO 97/11484, published Mar. 27, 1997. The reported abrasive article has a textured abrasive surface which includes abrasive particles dispersed in a binder. In use, the abrasive article is contacted with a semiconductor wafer surface, often in the presence of a fluid or liquid. with a motion adapted to modify a single layer of material on the wafer and provide a planar, uniform wafer surface. Use of an abrasive article overcomes a significant number of problems associated with CMP slurries.
The present invention exploits the advantages afforded by use of abrasive articles to modify surfaces of semiconductor wafers in order to expose at least two different materials, typically having different hardness values on the surface of a wafer.
SUMMARY OF THE INVENTION
This invention pertains to a method of modifying or refining the surface of a wafer suited for semiconductor fabrication. This method may be used to modify a wafer having a first material having a surface etched to form a pattern or a design and a second material deployed over the surface of the first material. A first step of this method comprises contacting the second material of the wafer to a plurality of three-dimensional abrasive composites fixed to an abrasive article, the three-dimensional abrasive composites comprising a plurality of abrasive particles fixed and dispersed in a binder. A second step is relatively moving the wafer while the second material is in contact with the plurality of abrasive composites until the exposed surface of the wafer is planar and comprises at least one area of exposed first material and one area of exposed second material. The second material is typically a metal, however the second material may be an intermediate material such as adhesion/barrier layer, or a combination of a metal and an adhesion/barrier layer. The first material is typically a dieletric material. Some suitable intermediate materials or adhesion/barrier layers include tantalum, titanium, tantalum nitride, titanium nitride. Other suitable intermediate materials or adhesion/barrier layers include metals, nitrides, and silicides.
As used in this specification, wafer typically includes a first material with a surface etched to form a pattern or a design and a second material deployed over the surface of the first material. The designs associated with the first material include patterned areas, grooved areas, and vias, as well as other structures which make up a completed semiconductor device. The wafer surface produced by a process such as the Damascene process, and modified by the abrasive article of the present invention, is preferably free of scratches or other defects that would interfere with the function of the semiconductor device. In preferred embodiments, the wafer surface is planar and has a surface free of scratches or other defects as measured by an Rt value. Preferred Rt values provided by this invention are typically less than about 3,000 Angstroms, preferable less than about 1,000 Angstroms, and most preferable less than about 500 Angstroms. The wafer may include a third, fourth, fifth, or more materials forming layers on a base layer of the wafer. Each layer may be modified as exemplified above for a wafer having only a first material and a second material.
A method of modifying a wafer during the Damascene process may, for example, start with a wafer having at least a first material and a second material present on the base of the wafer. At least one of the materials may have a surfac
Hardy L. Charles
Kaisaki David A.
Kranz Heather K.
Wood Thomas E.
3M Innovative Properties Company
Blank Colene H.
Everhart Caridad
Pastirik Daniel R.
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