Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2000-09-07
2001-11-06
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S332000, C327S333000
Reexamination Certificate
active
06313686
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a waveform output device with a mechanism for canceling EMI (Electro-Magnetic Interference) noise.
2. Description of the Related Art
When a waveform output device for outputting waveforms produces EMI noise at the time it output a waveform, the EMI noise is radiated to another device positioned near the waveform output device, tending to cause the other device to operate in error.
EMI noise is generated if the outputted waveform has sharp positive-going edges and undergoes overshoot.
Since conventional waveform output devices do not have a mechanism for controlling the overshoot of outputted waveforms and the amplitudes of positive-going edges thereof, the outputted waveforms tend to have greater amplitudes than necessary. As a result, the conventional waveform output devices produce large EMI noise that is radiated to other neighboring devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a waveform output device with an EMI noise canceler mechanism for canceling radiated EMI noise by controlling the amplitudes of waveforms to be outputted thereby.
To achieve the above object, there is provided in accordance with the present invention a waveform output device with an EMI noise canceler mechanism for controlling the amplitude of a waveform to output a waveform from which EMI noise is canceled, comprising a waveform input unit for being supplied with a clock signal waveform, an NMOS transistor having a gate connected to the waveform input unit and a source connected to ground, the NMOS transistor being selectively turned on and off based on a clock signal waveform supplied from the waveform input unit, a first PMOS transistor having a gate connected to the waveform input unit, a drain connected to a power supply through a first resistive component, and a source connected to a drain of the NMOS transistor, the first PMOS transistor being selectively turned on and off based on a clock signal waveform supplied from the waveform input unit, for producing a rising waveform at the source thereof when the first PMOS transistor is turned on, a waveform output unit for outputting a waveform at a junction between the first PMOS transistor and the NMOS transistor, second resistive components in n (n is a natural number) stages each having one terminal connected to the power supply, second PMOS transistors in n stages having respective drains connected to other terminals of the second resistive components, and respective sources connected to the drain of the first PMOS transistor, and a controller having an input terminal connected to the junction between the source of the first PMOS transistor and the drain of the NMOS transistor, and an output terminal connected to respective gates of the second PMOS transistors, for selectively turning on and off the second PMOS transistors based on a waveform at the junction between the source of the first PMOS transistor and the drain of the NMOS transistor, the controller having means for turning off the second PMOS transistors successively from a first stage to change a resistance between the first PMOS transistor and the power supply, the waveform output unit having means for outputting the waveform, whose amplitude has been controlled by the resistance between the first PMOS transistor and the power supply, at the junction between the first PMOS transistor and the NMOS transistor.
The controller comprises differential amplifiers in n stages each having one input terminal for being supplied with the waveform at the junction between the source of the first PMOS transistor and the drain of the NMOS transistor, and another input terminal for being supplied with a comparison potential, for generating and outputting a rising waveform based on a potential of the waveform at the junction between the source of the first PMOS transistor and the drain of the NMOS transistor and the comparison potential, third resistive components in n stages each having one terminal connected to the power supply, and flip-flops in n stages having respective CLK input terminals for being supplied with the respective rising waveforms outputted from the differential amplifiers, respectively, and respective DATA input terminals connected to other terminals of the third resistive components, for generating signals based on the rising waveforms supplied to the CLK input terminals and outputting the generated signals to respective gates of the second PMOS transistors, each of the flip-flops having means for outputting the signal generated based on the rising waveform supplied to the CLK input terminal to an enable terminal of the differential amplifier at a next stage.
The second PMOS transistors and the second resistive components are positionally switched around in a transmission path between the first PMOS transistor and the power supply.
The waveform output devices comprises a fourth resistive component connected to the NMOS transistor.
The waveform output device further comprises a fifth resistive component connected to the first PMOS transistor.
According to the present invention, there is also provided a waveform output device with an EMI noise canceler mechanism for controlling the amplitude of a waveform to output a waveform from which EMI noise is canceled, comprising a waveform input unit for being supplied with a clock signal waveform, an NPN transistor having a base connected to the waveform input unit and an emitter connected to ground, the NPN transistor being selectively turned on and off based on a clock signal waveform supplied from the waveform input unit, a first PNP transistor having a base connected to the waveform input unit, a collector connected to a power supply through a first resistive component, and an emitter connected to a collector of the NPN transistor, the first PNP transistor being selectively turned on and off based on a clock signal waveform supplied from the waveform input unit, for producing a rising waveform at the emitter thereof when the first PNP transistor is turned on, a waveform output unit for outputting a waveform at a junction between the first PNP transistor and the NPN transistor, second resistive components in n (n is a natural number) stages each having one terminal connected to the power supply, second PNP transistors in n stages having respective collectors connected to other terminals of the second resistive components, and respective emitters connected to the collector of the first PNP transistor, and a controller having an input terminal connected to the junction between the emitter of the first PNP transistor and the collector of the NPN transistor, and an output terminal connected to respective bases of the second PNP transistors, for selectively turning on and off the second PNP transistors based on a waveform at the junction between the emitter of the first PNP transistor and the collector of the NPN transistor, the controller having means for turning off the second PNP transistors successively from a first stage to change a resistance between the first PNP transistor and the power supply, the waveform output unit having means for outputting the waveform, whose amplitude has been controlled by the resistance between the first PNP transistor and the power supply, at the junction between the first PNP transistor and the NPN transistor.
The controller comprises differential amplifiers in n stages each having one input terminal for being supplied with the waveform at the junction between the emitter of the first PNP transistor and the collector of the NPN transistor, and another input terminal for being supplied with a comparison potential, for generating and outputting a rising waveform based on a potential of the waveform at the junction between the emitter of the first PNP transistor and the collector of the NPN transistor and the comparison potential, third resistive components in n stages each having one terminal connected to the power supply, and flip-flops in n stages having respective CLK
Lam Tuan T.
NEC Corporation
Nguyen Hiep
Sughrue Mion Zinn Macpeak & Seas, PLLC
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