Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
1998-02-20
2001-11-06
Hjerpe, Richard (Department: 2783)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S032000, C712S034000
Reexamination Certificate
active
06314508
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a RISC type microprocessor and an information processing apparatus, in particular, to a RISC type microprocessor of which RISC technologies are applied for a conventional one-chip microcomputer so as to execute an interrupt process and a numeric operation at high speed and an information processing apparatus having the RISC type microprocessor.
2. Description of the Prior Art
Conventional RISCs (Reduced Instruction Set Computers) have been developed as engines for computers mainly to increase the speed of arithmetic operations. The instruction length of the RISCs is normally 32 bits, fixed.
In a one-chip microcomputer integrated with a RISC, since the code efficiency is low, the interrupt process is performed by another chip. Thus, the speed of the interrupt process is low. On the other hand, with a conventional one-chip microcomputer, arithmetic operations cannot be performed at high speed.
OBJECTS AND SUMMARY OF THE INVENTION
The present invention is made from the above-described point of view- The RISC technologies are employed for a one-chip microcomputer so as to perform both the interrupt process and the arithmetic operations at high speed.
According to a first embodiment of the invention, the RISC type microprocessor comprises a decoding means for decoding a predetermined fixed-length instruction.
The fixed-length instruction is decoded by a decoding means. Thus, the decoding process for an instruction can be performed at high speed.
According to a second embodiment of the invention, the RISC type microprocessor comprises a mode allocating means for allocating a first mode for cyclically executing processes corresponding to a plurality of interrupts at predetermined intervals or a second mode for successively executing the processes corresponding to the interrupts, and an interrupt controlling means for controlling the interrupts corresponding to the mode allocated by the mode allocating means.
In the second embodiment of the invention, the RISC type microprocessor is operable to implement a first mode for cyclically executing processes corresponding to a plurality of interrupts at predetermined intervals or a second mode for successively executing the processes corresponding to the interrupts is allocated by a mode allocating means. The interrupt process is controlled by an interrupt controlling means corresponding to the mode allocated by the mode allocating means. Thus, the interrupt process can be effectively executed.
According to a third embodiment of the invention, the one-chip microcomputer comprises a transferring means provided independently from a data bus of the RISC type microprocessor, dedicatedly used by the coprocessor, and adapted for transferring data.
In the third embodiment of the invention, the one-chip microcomputer includes a transferring means is provided independently from a data bus of the RISC type microprocessor. The transferring means is dedicatedly used by the coprocessor and adapted for transferring data. Thus, the coprocessor can transfer data independently from the RISC type microprocessor.
A fourth embodiment of the invention has a receiving unit for receiving a radio wave from a GPS satellite and a RISC type microprocessor for processing a signal corresponding to the radio wave received by the receiving unit, wherein the receiving unit for receiving the radio wave from the GPS satellite and the RISC type microprocessor for processing the signal corresponding to the radio wave are integrated in one chip.
In the fourth embodiment of the invention a receiving unit that receives the radio wave from a GPS satellite and a RISC type microprocessor that processes the signal corresponding to the radio wave are integrated in one chip. Thus, the size of the apparatus can be reduced.
The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.
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Frommer William S.
Frommer Lawrence & Haug LLP.
Hjerpe Richard
Monestime Mackly
Polito Bruno
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