Apparatus for printed circuit board repair

Metal working – Means to assemble or disassemble – Means to disassemble electrical device

Reexamination Certificate

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Details

C029S426100, C029S739000, C029S740000, C029S842000, C029S845000

Reexamination Certificate

active

06295724

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to printed circuit boards used in electronic systems and, more particularly, to a method and apparatus for reworking or repairing printed circuit boards including solder ball grid arrays.
2. Prior Art
An article in the
IBM Technical Disclosure Bulletin
(TDB), Vol. 24, No. 2, July 1981, at p. 1237, shows an insulating device for plugging a drilled-out hole in a printed circuit board (PCB). The article does not teach the method or apparatus in accordance with the present invention as taught and claimed herein.
An article in the
IBM TDB
, Vol. 33, No.
1
B, June 1990, at p. 475, teaches a device for repairing a printed circuit net using a coaxial cable-to-board pin connection. The articles shows a method for reconstructing a deleted internal net of the PCB by utilizing an insulated bifurcate connector pin with an extended tail which provides pluggability with a coaxial cable. The article does not describe how the connector would be connected to pads in a ball grid array, and further, the physical size of the device shown in the article is much too large for use with a ball grid array pattern on a printed circuit board. In any event, the article does not teach nor suggest the present invention as taught and claimed herein.
An abstract No. 34488, published in
Research Disclosure
, December 1992, No. 344, by Kenneth Mason Publications, Ltd., shows a method for repairing open circuits in a printed circuit board. However, the article does not teach nor suggest the present invention as taught and claimed herein.
An article in the
IBM
7
DB
, Vol. 36, No. 12, December 1993, at p. 133, teaches a technique for reworking solder ball connections, engineering change or wire add to a printed circuit board. Although the article shows both via-in-pad and dog bone configurations, the article does not teach nor suggest either the wire loop technique nor the rigid pin structure as is taught and claimed herein.
U.S. Pat. No. 3,230,297 teaches a circuit board with a connector with solder resistant portions. However, the patent teaches a repair of a simple double-sided board rather than current multi-layer boards, and the patent does not address the problems associated with ball grid arrays as are taught and claimed herein.
U.S. Pat. No. 3,361,869 teaches an apparatus for making connections to a printed circuit board and for circuit line repair. However, the patent does not teach nor suggest the present invention as taught and claimed herein.
U.S. Pat. No. 3,406,246 teaches an apparatus for repair of printed circuit lines on a double-sided printed circuit board. However, the patent does not teach nor suggest the present invention as taught and claimed herein.
U.S. Pat. No. 4,409,732 teaches a circuit isolator element for use in isolating leads while testing components on a printed circuit board. However, the patent does not teach nor suggest the present invention as taught and claimed herein.
U.S. Pat. No. 4,778,556 teaches an apparatus for correcting or repairing printed circuit boards. The patent only teaches adding conductors to an existing printed circuit board. The patent does not teach nor suggest deletion of printed circuits nor ball grid array processing as are taught and claimed herein.
Although the prior art generally discusses repairing or reworking printed circuit boards, the prior art does not address the problem of isolating circuits and reconnection to a ball grid array in state of the art printed circuit board structures which have extremely small spacing.
SUMMARY OF THE INVENTION
It is an object of the present invention to rework or repair a printed circuit board efficiently and at minimum cost.
Accordingly, method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
Alternately, after the plated through hole is drilled out, an insulated wire may be inserted into the hole with insulation removed from the length of the wire which extends beyond one surface of the printed circuit board. The bare length of wire is bent parallel to the surface of the printed circuit board and attached thereto by a solder reflow process. In a dog bone configuration, the wire is formed around a pad on the surface of the printed circuit board which receives the solder ball.
It is an advantage of the present invention that a printed circuit board may be reworked in such a fashion so as to be compatible with connection of either single wires or twisted pair or coaxial cable. Further, it is an advantage of the present invention that rework of a printed circuit board may be accomplished in a simple and inexpensive manner.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.


REFERENCES:
patent: 3230297 (1966-01-01), Means
patent: 3361869 (1968-01-01), Gutbier et al.
patent: 3406246 (1968-10-01), Davidson et al.
patent: 4409732 (1983-10-01), Poff
patent: 4778556 (1988-10-01), Wery et al.
patent: 5161726 (1992-11-01), Francis
patent: 5257452 (1993-11-01), Imai et al
patent: 5557844 (1996-09-01), Bhatt et al.
patent: 5809641 (1998-09-01), Crudo et al.
patent: 6018866 (2000-02-01), Crudo et al.
IBM Technical Disclosure Bull. vol. 33 No. 1B Jun. 1990, pp. 475-476.

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