Thin-film transistor and method of making same

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S059000, C257S763000, C257S770000, C257S764000

Reexamination Certificate

active

06333518

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin-film transistor of a liquid crystal display and, more particularly, to a thin-film transistor having a gate including a double-layered metal structure and a method of making such a double-layered metal gate.
2. Discussion of Related Art
An LCD (Liquid Crystal Display) includes a switching device as a driving element, and a pixel-arranged matrix structure having transparent or light-reflecting pixel electrodes as its basic units. The switching device is a thin-film transistor having gate, source and drain regions.
The gate of the thin-film transistor is sometimes made of aluminum to reduce its wiring resistance, but an aluminum gate may cause defects such as hillock.
One alternative to using pure aluminum to form a gate, is to use an aluminum alloy to prevent the hillock problem. However, the use of an aluminum alloy such as AlTa in which diffusion of Aluminum atoms is prevented by adding a small amount of a refractory metal such as Ta, causes the gate to be electrically and chemically unstable.
Another alternative is to form a double-layered metal gate, i.e., molybdenum-coated aluminum gate, to overcome the problem of the hillock.
One such prior art double-layered metal gate is shown in FIGS.
1
and
2
A-
2
F.
FIG. 1
is a top plan view of a prior art thin-film transistor and
FIGS. 2A-2F
are cross-sectional views of
FIG. 1
along line X—X.
To fabricate a double-layered gate, metals such as aluminum and molybdenum are sequentially deposited, followed by a patterning process carried out via photolithography to form resulting metal films which have the same width. Although the double-layered gate is desirable to overcome the problem of hillock, the resulting deposited metal films forming the double-layered gate are so thick that a severe single step is created by a thickness difference between the metal films and a substrate, thereby causing a single step difference between the substrate and the double-layered gate which deteriorates the step coverage of a later formed gate oxide layer. The source and drain regions formed on the gate oxide layer may have disconnections between areas of the source and drain regions which are overlapped and non-overlapped with the gate, or electrically exhibit short circuits as a result of contact with the gate.
In such a method of forming the gate, each of the metal layers of Al and Mo form a clad structure as seen in
FIGS. 2A-2F
.
FIGS. 2A through 2F
are diagrams illustrating the process for fabricating a thin-film transistor of FIG.
1
. Referring to
FIG. 2A
, aluminum is deposited on a substrate
11
to form a first metal layer
13
. Then a second metal layer
15
is formed so as to completely cover the first metal layer
13
to define a clad structure seen in FIG.
2
B. The second metal layer
15
is formed by depositing Mo so as to completely cover the first metal layer
13
.
Thus, the first and second metal layers
13
and
15
form a gate having a double-layered metal structure in a clad arrangement. The clad structure defines a single step difference between the gate structure and the substrate
11
.
A gate insulating film
17
is then formed over the gate electrode clad structure formed by the first and second metal layers
13
,
15
. A semiconductor layer
19
is then formed by deposition and etching on the gate electrode insulating film
17
. Then a contact layer
21
is formed by deposition and etching to cover the semiconductor layer as seen in FIG.
2
C.
Then an electrode layer
23
is formed on the contact layer
21
by deposition and etching. The electrode layer
23
and the contact layer
21
are further etched to form a channel region so as to separate the contact layer
21
and electrode layer
23
into two separate electrodes as seen in FIG.
2
D.
An electrode insulating film
25
is then deposited on the electrode layer
23
and in the channel region located between the two separate electrodes formed by the electrode layer
23
. The electrode insulating film
25
is etched to form a contact hole
27
therein as seen in FIG.
2
E.
Finally, a transparent electrode such as a pixel electrode
29
is formed by deposition and etching on the electrode insulating film
25
and to fill the hole
27
in the electrode insulating film
25
such that the pixel electrode
29
is electrically connected to one of the two electrodes (source and drain) formed by the electrode layer
23
.
The clad structure of the gate electrode formed by the first metal layer
13
and the second metal layer
15
experiences many problems. With the clad structure shown in
FIGS. 2A-2F
, hillock may be formed on either side of the single step difference between the gate electrode and substrate. In addition, the step coverage of later formed layers is decreased and the source and drain regions formed on the gate oxide layer may have disconnections between areas of the source and drain regions which are overlapped and non-overlapped with the gate or electrically exhibit short circuits as a result of contact with the gate.
In another conventional thin-film transistor shown in
FIG. 3
, a substrate
31
has an inner gate electrode
34
includes a first metal layer
34
a
consisting of Al and a second metal layer
34
b
consisting of a Mo layer. The first and second metal layers
34
a,
34
b
are formed such that there is only a single step difference between the gate electrode
34
and the substrate
31
as a result of the first and second metal layers
34
a,
34
b
having substantially the same width.
An outer gate electrode
35
is formed on the inner gate electrode
34
so as to completely cover the first and second metal layers
34
a,
34
b.
The outer gate electrode
35
and the inner gate electrode
34
form a gate electrode
32
.
The gate electrode
32
is covered by a first gate insulating film
36
to protect the gate electrode
32
. Then a second gate insulating film
37
is formed to cover the first gate insulating film
36
. The second gate insulating film
37
has a semiconductor layer
38
formed thereon. An insulating layer
39
is formed and etched so as to be located in a channel region between later formed source and drain electrodes consisting of a contact layer
40
and an electrode layer
41
. The contact layer
40
and the electrode layer
41
are etched to form a source electrode
42
and a drain electrode
43
. A pixel electrode
44
is formed on the same surface as the source and drain electrodes
42
,
43
and is electrically connected to the drain electrode
43
.
Similar to the conventional device shown in FIGS.
1
and
2
A-
2
F, the conventional thin-film transistor shown in
FIG. 3
has a single step difference between the gate electrode
34
and the substrate
31
and experiences many of the same problems including hillock on both sides of the first metal layer
34
a.
To avoid the problem of hillock at both sides of the first metal layer
34
a
also experienced by the device shown in
FIGS. 1-2F
, the device of
FIG. 3
must use a double-layered inner gate electrode
34
, an outer gate electrode
35
and an oxidation film
36
. Without the outer gate electrode
35
and the oxidation film
36
, this structure would be similar to the structure shown in
FIGS. 1-2F
and experience all of the same problems experienced by the device of
FIGS. 1-2F
as described above.
Although such a structure shown in
FIG. 3
may avoid the problem of hillock, it requires far more process steps and layers and increases the time and cost of manufacturing a thin-film transistor.
According to another method of forming the gate, each of the metal layers of Al and Mo form a double step difference with the substrate so as to improve the step coverage of the gate oxide layer.
An example of this method of forming a double metal layer gate structure is described in “Low Cost, High Quality TFT-LCD Process”, SOCIETY FOR INFORMATION DISPLAY EURO DISPLAY 96, Proceedings of the 16th International Display Research Conference, Birmingham, England, Oct. 1, 1996, pages 591

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