Pinchoff voltage generator

Details Pinchoff voltage generator Pinchoff voltage generator

1987-03-13

1988-07-26

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307304, 307491, 307501, H03K 301

Patent

active

047602848

ABSTRACT:
In an integrated circuit, a reference voltage proportional to the pinchoff voltage of a field effect transistor is created by providing a current source, including a first depletion-mode FET, and a second depletion mode FET having a source connected to the drain of the first FET at an output node. The first and second FETs have their source and drain, respectively, connected to the first and second supply voltages, respectively, so that in operation, substantially equal currents flow through the two transistors. The FETs are biased to operate in saturation. Regarding the first FET, this current is equal to I.sub.DSS (defined as I.sub.D when V.sub.GS =0) of the first FET (I.sub.DSS1) and is not greater than, and usually less than, I.sub.DSS of the second FET (I.sub.DSS2). The dimensions of the FETs are proportioned such that the gate-source voltage across the second FET substantially equals a constant times the pinchoff voltage.

REFERENCES:
patent: 4096430 (1978-06-01), Waldron
patent: 4451744 (1984-05-01), Adam
patent: 4609833 (1986-09-01), Guterman

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