High-frequency high-current line driver

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S111000

Reexamination Certificate

active

06326820

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to the design of integrated circuit products in the semiconductor industry and more particularly to a high-frequency high-current line driver.
High-current line driver circuits should be designed to provide output currents of up to +150 mA or −150 mA. Such circuits should be frequency stable for various load conditions and should operate with minimum stand-by current.
Conventional Line Driver
FIG. 1
shows a conventional high-frequency high-current line driver
100
. This is a well-known folded cascode op-amp with a class AB output stage. Its operation is well-known in the art. The op-amp circuit shown has three main stages: a differential input cascode stage
102
, an output stage
104
, and a biasing stage
106
. Two direct current (dc) supplies V
DD
and V
ss
can be used to supply these stages, where V
ss
is represented as a ground source. An input voltage V
IN1
generates current flow by turning on current sources in the three stages.
Differential input cascode stage
102
drives line driver
100
. Input stage
102
includes two main circuits: a differential amplifier
110
and a current mirror
112
. Differential amplifier
110
includes transistors
111
,
112
, and
113
. Input stage
102
also includes current source transistors
116
,
117
,
118
, and
119
. Current mirror
112
includes transistors
121
,
122
,
123
, and
124
. Both circuits
110
and
112
couple together via source transistors
116
,
117
,
118
, and
119
.
Generally, differential amplifier
110
controls the current flow through current mirror
112
to provide a high-current to output stage
104
. Also, differential amplifier
110
controls the output voltage swing, or switching, of output stage
104
. Differential input cascode stages are well-known in the art. Details of structure and operation are further described in below in the detailed description.
Output stage
104
provides the output for line driver
100
. Output stage
104
is a push-pull output stage, more specifically, a class AB output stage. Output stage
104
includes transistors
126
,
128
,
130
, and
132
, and a source transistor
134
. Output stage
104
also includes two compensation circuits. The two compensation circuits provide frequency compensation for output stage
104
. The first compensation circuit includes transistor
136
and capacitor
138
. The second compensation circuit includes transistor
140
and capacitor
142
. This first compensation circuit applies when transistor
130
on. The second compensation circuit applies when transistor
132
is on. Transistors
136
and
140
are the only transistors that are in linear mode (the others are in saturation mode). Transistors
136
and
140
act as resistors connected in series with capacitors
138
and
142
, respectively. Class AB output stages are well-known in the art. Details of structure and operation are further described in below in the detailed description.
Under all conditions of an op-amp, or in any feedback configuration, stable operating conditions are desired. A phase shift of 180° resulting in a closed-loop gain of −1 could cause the circuit to oscillate. To avoid this at all times, compensation networks are added to the feedback circuit to modify phase shifts (frequency compensation), or to provide an adequate phase margin.
As is well-known in the art, the movement of the compensation zero, created by the compensation circuits, produces an undesired phase shift at high frequencies. This phase shift is undesired because it degrades frequency and transient responses. Here, as transistors
130
and
132
sink or source output current, the transconductance g
m
increases. The transconductance is the derivative of the output current with respect to the input voltage, or ∂I
OUT
/∂V
IN
. This increase causes the compensation zero, which is due to the compensation circuit, to shift according to the equation:
S
z
=
-
1
[
1
/
(
g
ds
)
-
1
/
(
g
m
)
]

C
(
1
)
where g
ds
is the conductance of the compensation switch (transistors
136
and
140
), g
m
is the transconductance of transistors
130
and
132
, and C is the compensation capacitor (capacitors
138
and
142
). As the output current varies, the g
m
factor typically varies more than the g
ds
factor does. In the frequency domain, the location of the compensation zero S
z
thus moves.
Biasing stage
106
provides dc biasing of the transistors of output stage
104
such as ensuring the appropriate transistors are in saturation mode (not in linear mode). Biasing stage
106
completes a translinear loop
144
and a translinear loop
150
, each of which controls current flow through output stage
104
. Translinear loop
144
includes transistors
146
,
148
,
128
, and
132
. Translinear loop
150
includes transistors
152
,
154
,
126
, and
130
. Loops
144
and
150
set the quiescent current in output transistors
132
and
130
, respectively.
Biasing stage
106
also includes biasing transistors
156
-
164
. Biasing transistors, such as these, are well-known in the art. Voltages are fed to these transistors, as well as to other transistors of line driver
100
, at inputs V
IN1
, V
IN2
, V
IN3
, and V
IN4
. By voltage or current, transistors
156
-
164
bias other transistors within line driver
100
. The transistor sizes and conditions of line driver
100
are predetermined such that all voltages and operating conditions saturate the appropriate transistors. Methods for optimizing such transistor sizes and conditions are well-known in the art. Biasing circuits and translinear loops are well-known in the art. Details of structure and operation are further described in below in the detailed description.
In a high frequency circuit, a short channel length L is necessary for higher speeds. The transistor speed F
T
depends on and is inversely proportional to the square of the channel length L. This can be described mathematically by F
T
∝1/L
2
. Accordingly, output devices should have the shortest channels the process will allow. The Early voltage effect, however, is greater with shorter channel lengths. This impedes the efficiency of the translinear loops.
Mathematically, as described by the equation, I
ds=
½&bgr;(v
gs
−V
T
)
2
*(1+&lgr;v
ds
), the current I
ds
depends on biasing conditions v
gs
and v
ds
, among other process parameters such as &bgr;, V
T
, and &lgr;. The factor (1+&lgr;v
ds
) is not ideal because it gives rise to a non-ideal output impedance. Effectively, the factor (1+&lgr;v
ds
) impedes the efficiency of the translinear loops. The equation shows that a larger &lgr; causes v
ds
to have a greater effect on the current. The process parameter &lgr; depends on and is inversely proportional to the channel length L, i.e., L ∝ 1/&lgr;, where the quantity 1/&lgr; is also referred to as the Early voltage. A shorter channel length L, which is desired, thus correlates to a larger &lgr;. This effect can be referred to as the &lgr; effect or the Early voltage effect. The Early voltage effect principle is well-known in the art. A shorter channel length can thus effect the output transistor current such that it is no longer well controlled by the translinear loop.
For example, referring to translinear loop
144
, transistors
148
and
146
30
control the current flow through
128
and
132
, ideally. When the drain-to-source voltages v
ds
of these transistors do not match, due to a variance in the v
ds
transistor
132
for example, significant current mismatch errors occur. Such a variance in v
ds
occurs, for example, during quiescent conditions when the output V
OUT
sits at mid-supply, or V
DD
/2. Specifically, current through transistors
128
and
132
should, but would not, correctly mirror the current through transistors
148
and
146
because of different device ratios. That is, the current (through transistors
128
and
132
) would have an extra component due to the v
ds
differences. As a result of this difference, transistors

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