Modulators – Phase shift keying modulator or quadrature amplitude modulator
Reexamination Certificate
1998-05-05
2001-02-27
Mis, David (Department: 2817)
Modulators
Phase shift keying modulator or quadrature amplitude modulator
C332S104000, C375S283000, C375S308000
Reexamination Certificate
active
06194977
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to signal processing, and, in particular, to &pgr;/4-differentially encoded quadrature phase-shifted keying (&pgr;/4-DQPSK) modulation.
2. Description of the Related Art
FIG. 1
shows a block diagram of a conventional digital system
100
for encoding and modulating speech-related audio signals for transmission using &pgr;/4-DQPSK modulation. As shown in
FIG. 1
, analog-to-digital converter
102
digitizes the input signal, speech encoder
104
encodes the digitized stream, channel encoder
106
adds redundant bits to the encoded data, interleaver
108
interleaves the encoded data (to enable a receiver to perform error correction in the presence of burst errors in the transmitted signals), and modulator
110
applies &pgr;/4-DQPSK modulation to dibits (i.e., pairs of bits) in the interleaved data stream to generate multi-bit digital values DI and DQ corresponding to the in-phase (or real) and quadrature-phase (or imaginary) parts of the modulated signal. These two digital streams DI and DQ are converted to analog signals by digital-to-analog (D/A) converters
112
, and the analog signals are then filtered by low-pass filters
114
to yield the two analog output signals AI and AQ corresponding to the in-phase and quadrature-phase parts of the modulated signal.
In &pgr;/4-DQPSK modulation, an input stream of dibits, represented by (y,x), is converted into a modulated output stream of complex values I+jQ, where I is the in-phase or real part and Q is the quadrature-phase or imaginary part of each complex value. In typical digital implementations, this conversion process involves the application of a computationally intense finite impulse response (FIR) filter to an over-sampled data stream to generate a stream of over-sampled interpolated complex values. The degree of over-sampling in the conversion process is often limited by the finite processing capabilities of the processor used to implement the modulation scheme. As such, the level of distortion in the modulated signals may be higher than desirable. Less distortion can be achieved by using more costly processors that have greater processing capabilities to handle higher levels of over-sampling.
SUMMARY OF THE INVENTION
The present invention is directed to a modulation scheme (e.g., &pgr;/4-DQPSK) that greatly simplifies the real-time computations involved in converting input data into modulated signals. As a result, for a given processor, the modulation scheme of the present invention can be implemented with a greater degree of over-sampling, thereby providing modulated signals with less distortion, than conventional &pgr;/4-DQPSK modulation schemes, without having to use more expensive processors.
According to one embodiment, the present invention is a method for generating phase-based modulation signals from an input data stream. In a phase-based modulation scheme, information is encoded as phase changes within the modulated signal. State variables are generated from sets of bits in the input data stream, and address pointers are generated using the state variables. Pre-computed values corresponding to filter outputs are retrieved from memory using the address pointers, and the modulation signals are generated by applying addition/subtraction operations to the pre-computed values. Using pre-computed filter-output values reduces the computational load, thereby allowing a greater degree of over-sampling for a given processor.
In another embodiment, differential state encoding is performed to generate state variables from sets of bits in the input data stream, and sample generation is performed to generate the modulation signals from the state variables. The sample generation comprises the steps of (1) updating registers using the state variables; (2) generating look-up table addresses from values in the registers; (3) retrieving from memory pre-computed values corresponding to filter outputs using the look-up table addresses; and (4) applying addition/subtraction operations to the pre-computed values to generate the modulation signals.
According to yet another embodiment, the present invention is an integrated circuit having a modulator for generating phase-based modulation signals from an input data stream. The circuit comprises (a) a differential state encoder adapted to generate state variables from sets of bits in the input data stream and (b) a sample generator adapted to generate the modulation signals from the state variables. The sample generator comprises (1) registers whose values are updated using on the state variables and whose values are used to generate look-up table addresses to retrieve from memory pre-computed values corresponding to filter outputs and (2) addition/subtraction operators adapted to generate the modulation signals from the pre-computed values.
REFERENCES:
patent: 5428643 (1995-06-01), Razzell
patent: 5512865 (1996-04-01), Fague
patent: 5604770 (1997-02-01), Fetz
patent: 5768317 (1998-06-01), Fague et al.
Lucent Technologies - Inc.
Mendelsohn Steve
Mis David
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