Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-12-02
2001-02-06
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000
Reexamination Certificate
active
06184477
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-layer circuit substrate which is used for an electronic circuit board and so on, and specifically relates to a structure of a conductive layer for an electric wiring conductor in the multi-layer circuit substrate.
2. Description of the Related Art
Conventionally, in a multi-layer circuit substrate which is used for an electronic circuit board and so on with a semiconductor device such as a semiconductor integrated circuit device being mounted, at the time of forming a conductive layer for an electric wiring conductor, an insulating layer made of ceramics such as alumina and a conductive layer for an electric wiring conductor made of a metal with high melting point such as tungsten are alternately laminated. Thus, the multi-layer circuit substrate is constructed.
In the conventional multi-layer circuit substrate, among the conductive layers for electric wiring conductors, a signal wiring conductor has a strip line structure in general, and so-called solid plane ground layers are formed above and below a line conductor layer formed as the signal wiring conductor, via insulating layers.
Further, in order to stabilize power distribution to a semiconductor device mounted on the multi-layer circuit substrate, the contact-patterned ground layer formed in the multi-layer circuit substrate and a conductive layer serving as a power wiring conductor are alternately laminated, whereby a capacity is generated between the ground layer and the conductive layer for a power wiring conductor.
Still further, as electric signals processed by a multi-layer circuit substrate have become faster: an insulating layer is made of a polyimide resin or an epoxy resin, either of which has a comparatively small dielectric constant of between 3.5 and 5, instead of alumina ceramics whose dielectric constant is about 10; on this insulating layer, a conductive layer for an electric wiring conductor made of copper (Cu) is formed using a thin-film forming technique by a vapor phase deposition method such as evaporation and sputtering; a minute wiring pattern is formed by a photolithography method; and the insulating layer and the conductive layer are multi-layered, whereby a multi-layer circuit substrate which shows high-density and high-performance and enables a semiconductor device to operate at a high speed, is obtained.
Furthermore, in such a multi-layer circuit substrate in which the insulating layer is made of a polyimide resin or an epoxy resin, there is a problem that, in the step of curing the resin in the multi-layering process, due to the outgassing of an unreacted component which exists in the resin of a lower layer and moisture which is absorbed by the resin, a solid plane formed on the resin blisters because a path through which the unreacted component and the moisture are dissipated into the air is shut down at the solid plane. Therefore, a ground layer is formed in the shape of a mesh (grid). In this case, it is difficult to generate a capacity by laminating the solid plane ground conductor layer and the conductive layer for a power wiring conductor which are formed in the multi-layer circuit substrate using the conventional ceramics insulating layer, so that a chip capacitor is mounted on the multi-layer circuit substrate so as to stabilize the power distribution to a semiconductor device.
However, in a case where the conventional insulating layer made of a polyimide resin or an epoxy resin is used for multi-layering, since the ground layer is formed in the shape of a mesh, a conductive layer for a signal wiring conductor which is interposed by the ground layers from above and below via the insulating layers, is installed so as to face both a portion where a metal layer forming the mesh ground layer is formed and a portion where the metal layer is unformed. As a result, the characteristic impedance of the signal wiring conductor varies depending on the positional relationship between the signal wiring conductor and the ground layer.
For this reason, the conventional multi-layer circuit substrate has such a problem that, while it is pursued to speed up electric signals as a semiconductor device becomes faster increasingly, high-speed electric signals which pass through a signal wiring conductor are to propagate through a signal wiring conductor having different characteristic impedance, so that a part of the electric signals is reflected, the inputted electric signals are not transmitted to an output side in a correct manner, and malfunctions of an electronic circuit and a semiconductor device occur.
Further, in the power distribution to a semiconductor mounted on the multi-layer circuit substrate, there is also such a problem that, owing to the inductance of a wiring conductor between a chip capacitor for stabilizing the power distribution and the semiconductor device and owing to the length of a distribution line, electric power which is necessary for the power distribution to the semiconductor device cannot be transmitted at a high speed.
In order to resolve the above-mentioned defects of the conventional multi-layer circuit substrate, for example, Japanese Unexamined Patent Publication JP-A 9-18156 (1997) and “Modeling and Experimental Verification of the Interconnected Mesh Power System (IMPS) MCM Topology” IEEE TRANSACTION ON COMPONENTS, PACKAGING, AND MANUFACTURING TECHNOLOGY—PART B. VOL. 20, NO. 1, FEBRUARY 1997, 42-49pp., which is a research released by Arkansas University in USA, disclose that a power wiring conductor, a ground wiring conductor and a signal wiring conductor are formed in the same layer in a multi-layer printed wiring substrate, the signal wiring conductor is placed at a position interposed by the power wiring conductor and the ground wiring conductor so as to form a coplanar line structure, and further this coplanar line is multi-layered at a twisted position, whereby a multi-layer circuit substrate is formed, and the nonuniformity of the characteristic impedance of the signal wiring conductor, which is a problem of the mesh ground structure, is resolved.
However, in a case where a number of signal wiring conductors are led out of a semiconductor device, a power wiring conductor, a ground wiring conductor and a signal wiring conductor are placed in the same layer for each layer in the multi-layer circuit substrate having the coplanar line structure. Therefore, as compared with the multi-layer circuit substrate based on the strip line structure in which only signal wiring conductors are placed in the same layer, the multi-layer circuit substrate having the coplanar line structure can obtain only about one-third of wiring density and hence cannot meet the requirement to densify wiring conductors.
Especially in recent years, as a semiconductor device has become high-performance, the number of signal wiring conductors of the semiconductor device needs to be more than 100, so that it has become further difficult to efficiently connect a number of signal wiring conductors to a semiconductor device in the multi-layer circuit substrate having the coplanar line structure.
SUMMARY OF THE INVENTION
The present invention was made in view of the above-mentioned problems, and an object of the invention is to provide a multi-layer circuit substrate which, by uniformizing the characteristic impedance of a signal wiring conductor, can prevent an occurrence of a noise due to a reflection caused by nonuniformity of the characteristic impedance when high-speed signals are propagated and prevent a malfunction of a semiconductor device, and further which can efficiently connect a number of signal wiring conductors to a semiconductor device.
A multi-layer circuit substrate according to a first aspect of the invention comprises:
first to fifth insulating layers laminated sequentially,
the first insulating layer having an upper face on which a first ground wiring conductor is installed in the shape of a grid;
the second insulating layer having an upper face on which a first signal wiring conductor is
Gaffin Jeffrey
Hogan & Hartson LLP
Kyocera Corporation
Norris Jeremy
LandOfFree
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