Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
1998-01-12
2001-02-06
Sikes, William L. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S040000, C349S042000, C349S192000, C345S092000, C257S443000
Reexamination Certificate
active
06184948
ABSTRACT:
This application claims the benefit of Korean Application No. P97-4003, filed in Korea on Feb. 11, 1997, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix liquid crystal display (AMLCD) including an active panel with thin film transistors (TFT) and pixel electrodes arranged in a matrix pattern. More particularly, the present invention relates to a shorting bar for probing the active panel and a simplified method of integrally manufacturing the shorting bar on the same substrate as the other elements of the active panel.
2. Discussion of the Related Art
Within the field of display devices for displaying visual images on a screen, thin film type flat panel display devices are highly favored because of their light weight and easy adaptability. In light of these advantages, research activities have focused on the development of liquid crystal display devices because of their high resolution and fast response time suitable for display of motion picture images.
A liquid crystal display device operates through the polarization and optical anisotrophy of a liquid crystal. By controlling the orientation of rod-shaped liquid crystal molecules through polarization techniques, transmission and interception of light through the liquid crystal are achieved due to the anisotrophy of the liquid crystal. This principle is applied to the liquid crystal display device. AMLCDs having TFTs arranged in a matrix pattern and pixel electrodes connected to the TFTs provide high quality images and are now widely used. The structure of a conventional AMLCD will now be described.
An LCD generally has a color filter panel and an active panel. A first panel of an LCD, which is the color filter panel, includes a sequential arrangement of red, blue and green color filters on a transparent substrate at pixel positions designed in a matrix pattern. Among these color filters, black matrixes are formed in a lattice pattern. On the color filters, a common electrode is formed.
A second panel of an LCD, which is the active panel, includes pixel electrodes designed in a matrix pattern and formed on a transparent substrate. Along the column direction of the pixel electrodes, a plurality of scan bus lines are arrayed, and along the row direction of the pixel electrodes, a plurality of data bus lines are arrayed. At a comer of a pixel electrode, a TFT for driving the pixel electrode is formed. A gate electrode of each TFT is connected with a respective one of the plurality of scan bus lines (which are therefore also referred to as gate lines). A source electrode of each TFT is connected with a respective one of the plurality of data bus lines (which are therefore also referred to as source lines). Additionally, a gate pad is formed at the end portion of each of the plurality of gate lines, and a source pad is formed at the end portion of each of the plurality of source lines.
The color filter panel and the active panel are bonded together with a certain distance therebetween (i.e., a cell gap) to face each other. Liquid crystal material fills the cell gap to complete the liquid crystal panel of the LCD.
The method of manufacturing a liquid crystal display device is very complex and includes a number of processes combined together. The method of manufacturing an active panel having TFTs and pixel electrodes involves increased complexity. Moreover, if the active panel has a shorting bar for probing it, the manufacturing method can be even more complex. Therefore, it is important to simplify the method for manufacturing an active panel to reduce the possibility of defects during the manufacture process.
A conventional method for manufacturing an active panel having a shorting bar is described with reference to
FIG. 1
, which shows a plan view of an active panel,
FIGS. 2
a
-
2
e
show cross sectional views taken along line II—II of
FIG. 1
,
FIGS. 3
a
-
3
e
show the cross sectional views taken along line III—III of
FIG. 1
, and
FIGS. 4
a
-
4
e
show the cross sectional views taken along line IV-IV of FIG.
1
.
As shown in
FIGS. 1
,
2
a
,
3
a
and
4
a
, an aluminum or an aluminum alloy is vacuum deposited on a transparent substrate
1
and patterned by using photolithography to form gate electrodes
11
, gate lines
13
, gate pads
15
, source pads
25
and a shorting bar
45
. The gate electrodes
11
are arrayed in a matrix pattern. The gate lines
13
connect gate electrodes
11
disposed in a column direction. A respective gate pad
15
is formed at the end of each respective gate line
13
. A respective source pad
25
is formed at the end portion of each respective source line, which are to be formed later. The shorting bar
45
makes a connection between the gate pad
15
and the source pad
25
, and surrounds the periphery of the substrate
1
.
A hillock can easily grow at the surface of the aluminum, and this hillock can prevent adequate adhesion of another material to be deposited on the aluminum. Therefore, the aluminum surface must be anodized in order to prevent such a hillock on the aluminum surface. Using the shorting bar
45
as an anode for anodizing, the elements formed of aluminum (gate electrodes
11
, gate line
13
, gate pads
15
, and source pads
25
) are anodized to form an anodic oxide film
19
on their surface. Since the gate electrodes
11
, the gate pads
15
, the gate lines
13
, and the source pads
25
are connected with the shorting bar
45
, connection of the shorting bar
45
with an anode facilitates the anodizing of the elements.
The gate pad
15
and the source pad
25
are covered by a resin such as a photo resist, using photolithography in order to prevent the formation of an anodic oxide film on their surfaces. This is done because if an anodic oxide film
19
is formed on the surface of the gate pads
15
and the source pad
25
, these pads will not receive the desired electrical data. Consequently, the gate electrode
11
has an anodic oxide film
19
, as shown in
FIG. 2
a
. The gate line
13
and the shorting bar
45
also have an anodic oxide film
19
, but the gate pad
15
and the source pad
25
do not have an anodic oxide film, as shown in
FIGS. 3
a
and
4
a.
As shown in
FIGS. 2
b
,
3
b
, and
4
b
, silicone oxide or silicone nitride is vacuum deposited on the substrate, including the gate electrodes
11
, the gate lines
13
, the gate pads
15
, the source pads
25
, and the shorting bar
45
, to form a gate insulating layer
17
. Then, a pure (intrinsic) semiconductor material and an impure (doped) semiconductor material are deposited sequentially and patterned by using photolithography to form a semiconductor layer
35
and an impure semiconductor layer
37
.
As shown in
FIGS. 3
b
and
4
b
, a first gate contact hole
51
on the gate pad
15
and a first source contact hole
61
on the source pad
25
are formed by using photolithography. Here, the contact holes
51
and
61
expose a portion of the gate pad
15
and a portion of the source pad
25
, respectively, which are not anodized.
As shown in
FIG. 2
c
, chromium (Cr) or a chromium alloy is vacuum deposited and patterned by using photolithography to form a source electrode
21
, a drain electrode
31
and source lines
23
on the impure semiconductor layer
37
. The exposed portion of the impure semiconductor
37
between the source electrode
21
and drain electrode
31
is removed by using the source electrode
21
and the drain electrode
31
as masks. In addition, chromium or a chromium alloy is also deposited on the gate pad
15
and source pad
25
. The first source contact hole
61
connects the source line
23
with the source pad
25
. Here, the chromium layer on the gate pad
15
connects the aluminum layer and a gate terminal (not shown), which is to be formed later, through the first gate contact hole
51
forming a gate pad intermediate electrode
55
, as shown
FIG. 3
c
. Similarly, the chromium layer on the source pad
25
protects the aluminum layer underneath and is used as a source pa
Chowdhury Tarifur R.
LG Electronics Inc.
Morgan & Lewis & Bockius, LLP
Sikes William L.
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