Method for forming isolation layer in semiconductor device

Details Method for forming isolation layer in semiconductor device Method for forming isolation layer in semiconductor device

1998-10-27

2000-05-16

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438713, 438719, 438723, 438757, H01L 2100

Patent

active

060637080

ABSTRACT:
A method for forming an isolating layer in a semiconductor device including the steps of sequentially forming a buffer oxide layer, a CVD oxide layer and a first nitride layer on a semiconductor substrate, selectively removing the first nitride layer, selectively exposing a surface of the semiconductor substrate using the first nitride layer as a mask, forming and planarizing a second nitride layer on the selectively exposed surface of the semiconductor substrate, removing the CVD oxide layer and buffer oxide layer using the second nitride layer as a mask, while leaving a nitride pattern layer which becomes wider in an upward direction, forming oxide sidewalls at sides of the nitride pattern layer, forming a trench having a slope by selectively etching the semiconductor substrate using the oxide sidewalls as a mask, depositing a filling insulating material layer on the nitride pattern layer, the oxide sidewalls and in the trench, planarizing the filling insulating material layer until a surface of the nitride pattern layer is exposed, removing the nitride pattern layer by using the filling insulating material layer as a mask, and etching back the filling insulating material layer to form an isolating layer having a portion in the trench and another portion at sides of the trench.

REFERENCES:
patent: 5866466 (1999-02-01), Kim et al.
patent: 5923993 (1999-07-01), Sahota
Han Sin Lee et al., 1996 Symposium on VLSI Technology Digest of Technical Papers, "An Optimized Densification of the Filled Oxide for Quarter Micron Shallow Trench Isolation (STI)," pp. 158-159.

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