Timing generation circuit for electro-optic sampling...

Details Timing generation circuit for electro-optic sampling... Timing generation circuit for electro-optic sampling...

1998-10-06

2001-10-30

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S093000, C327S115000, C327S117000, C327S162000, C375S362000

Reexamination Certificate

active

06310507

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electro-optic sampling oscilloscope in which an electrical field generated by a measured signal is coupled to an electro-optic crystal. An optical pulse which is generated based on a timing signal from a timing generation circuit is input into this electro-optic crystal, and the waveform of the measured signal is measured by the state of the polarization of the input optical pulse. The present invention relates in particular to an electro-optic sampling oscilloscope characterized in the timing generation circuit which generates a timing signal.
This application is based on patent application No.Hei 9-237156 filed in Japan, the content of which is incorporated herein by reference.
2. Background Art
It is possible to observe the waveform of a signal to be measured by coupling the electric field generated by the signal to be measured to an electro-optic crystal, causing laser light to enter this electro-optic crystal, and using the polarization state of the laser light. Here, it is possible to use this laser light in pulse form, and to conduct measurements with extremely high time resolution when the sampling of the signal to be measured is conducted. An electro-optic sampling oscilloscope employs an electro-optic probe which takes advantage of this phenomenon.
In comparison with conventional sampling oscilloscopes which employ electrical probes, such an electro-optic sampling oscilloscope (herein below termed an “EOS” oscilloscope) has the following characteristic features:
(1) When signals are measured, a ground wire is not required, so that measurement is simplified.
(2) The metal pin which is at the lead end of the electro-optic probe is isolated from the circuit system, so that it is possible to realize a high input impedance, and as a result, the state at the point at which measurement is conducted is essentially free of fluctuations.
(3) Since optical pulses are employed, measurement is possible in a broad band up to the order of GHz.
FIG. 10
serves to explain the measurement concept of the electro-optic probe in an EOS oscilloscope.
As shown in
FIG. 10
, a metal pin
21
is provided at the lead end of the electro-optic probe, and by placing this in contact with the signal line
31
which is the subject of measurement, an electric field
23
is generated based on the measured signal. In order to couple the electric field generated with an electro-optic crystal
22
, the electro-optic crystal
22
is provided at the end of the metal pin
21
. With respect to this electro-optic crystal
22
, as a result of Pockels effect, which is a primary electro-optical effect, the index of refraction of the electro-optic crystal changes in accordance with the coupled electric field strength, so that when an optical pulse
25
is inputted in this state, the polarization state of the optical pulse changes. The optical pulse
25
which experiences a change in polarization is reflected by reflection mirror
24
, which is a multi-layered dielectric film mirror, and is guided to the light receiver
26
, which serves as the input part of the polarization detecting optical system within the electro-optic probe (Shinagawa, et al: ““A High-Impedance Probe Based on Electo-Optic Sampling,” Proceeding of the 15
th
Meeting on Lightwave Sensing Technology, May 1995, pp 123-129).
Next, the structure of the EOS oscilloscope will be explained using FIG.
11
.
In
FIG. 11
, the EOS oscilloscope is constructed from an EOS oscilloscope main body
1
and an electro-optic probe
2
.
In
FIG. 11
, the EOS oscilloscope main body
1
is formed from a trigger circuit
3
, a timing generation circuit
4
, an optical pulse generation circuit
5
, an A/D converter
6
, a processing circuit
7
, and a setting unit
8
.
Here, the trigger circuit
3
generates the trigger signals of a frequency set by the setting unit
8
. In addition, the timing generation circuit
4
generates timing signals for A/D conversion in the A/D converter
6
. Moreover, these timing signals are generated by using as input signals which are the desired sampling rate, trigger signals from the trigger circuit
3
, and a clock signal from an internal clock. Here, the desired sampling rate means the sampling rate determined by the processing circuit
7
based on the x-axis scale which is the rate of expansion in the time direction of the measuring signal set by the setting unit
8
.
The optical pulse generation circuit
5
generates an optical pulse based on the signal from the timing generation circuit
4
, and supplies it to the electro-optic probe
2
. Then the polarized optical pulse is detected it's polarization determined by the polarization detection optical system (not shown) in the electro-optic probe
2
, and this signal is input into the EOS oscilloscope main body
1
. This signal is amplified and A/D converted by the A/D converter
6
. Then, the A/D converted signal is processed by the processing circuit
7
to be displayed, etc., as the signal which is the object of measurement.
FIG. 12
shows in more detail the timing generation circuit
4
in FIG.
11
. Moreover, this timing generation circuit
4
is used when the frequency of the trigger signals from the trigger circuit are higher than the desired sampling rate determined by the processing circuit
7
. In this type of case, in the timing generation circuit
4
, the divider ratio determination circuit
81
uses an internal clock of known oscillation frequency to generate a gate signal which is the cycle of the desired sampling rate, and counts the trigger signals input during the gate interval of this gate signal. For example, if the desired sampling rate is 4 [MHz] (a 250 [nS] period) and the trigger signals are 32 [MHz], a gate signal of 250 [nS] is generated using the internal clock, and when these trigger signals are counted during this interval, the count number is [8]. Next, the divider ratio determination circuit
81
uses this count value as the divider ratio, and sends this counted value to the frequency divider
82
.
The frequency divider
82
which receives the divider ratio divides the trigger signals by this divider ratio, and outputs the result as the timing signal. In the example described above, the 32 [MHz] gate signal is divided by the divider ratio of [8], and thus the timing signal of 4 [MHz], which is the desired sampling rate, is output.
However, the gate signal input to the timing generation circuit
4
in the above described EOS oscilloscope and internal clock are asynchronous. Because of this, as shown in part (a) in
FIG. 13
, even if the gate signal of 250 [nS], which is the period of the desired sampling rate, is generated by the internal clock, because of the difference of the oscillation timing between the internal clock and the trigger signal, the count number of the trigger signals in the divider ratio determination circuit
81
, as shown in part (b) in
FIG. 13
, is sometimes “8”, and as shown in part (c) in
FIG. 13
, sometimes “7”. That is, an error of ±1 is produced, and a timing signal different from the desired sampling rate is generated. As a result, the precision of the signal measurement using an EOS oscilloscope deteriorates.
SUMMARY OF THE INVENTION
In consideration of the above situation, it is the object of the present invention to provide an electro-optic sampling oscilloscope which precisely generates the timing signals that give the desired sampling rate, and can increase the precision of the signal measurement of the measured circuit.
Therefore, the invention provides an electro-optic sampling oscilloscope having a timing generation circuit of which generates a gate signal of a specified multiple N of the cycle of the desired sampling rate, counts the input trigger signals during the gate interval of said gate signal, and divides the count value by said specified multiple N, and determines a divider ratio.
In this manner, a divider ratio can

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