Error detection and correction coding

Details Error detection and correction coding Error detection and correction coding

1988-09-07

1991-02-12

Atkinson, Charles E.

Excavating

371 381, 371 401, G06F 1110

Patent

active

049930281

ABSTRACT:
A method of detecting bit errors in a possibly corrupted version of an original data word, the bits of the original data word (e.g., a 32-bit data word) being organized in nibbles of four bits each, each nibble being stored in a single four-bit memory chip. In the method, the unique combinations of data word bits used for deriving a first set of check bits are chosen so that the existence of any three bit errors or four bit errors within a single nibble of the possibly corrupted version will be detectable based on a first set of syndrome bits formed by comparing each original check bit of the first set with a corresponding new check bit.

REFERENCES:
patent: 4345328 (1982-08-01), White
patent: 4617664 (1986-10-01), Aichelmann et al.
patent: 4796222 (1989-01-01), Aichelmann, Jr. et al.
Worley, et al., "Ardent's Fast Memory", VLSI Systems Design, pp. 50-59, Aug. 1988.

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