Data output buffer with high drivability in semiconductor...

Details Data output buffer with high drivability in semiconductor... Data output buffer with high drivability in semiconductor...

1999-11-23

2001-02-13

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S376000, C327S378000, C326S021000, C326S027000, C326S082000, C326S087000

Reexamination Certificate

active

06188254

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a data output buffer; and more particularly, to a data output buffer improving the drivability in semiconductor devices.
DESCRIPTION OF THE PRIOR ART
In general, data output buffers, which output signals from an internal circuit to an external circuit, have been widely used in semiconductor devices and various integration circuits. Accordingly, the data output buffers should have high drivability in order to perfectly output signals from an internal circuit to an external circuit.
FIG. 1
shows a configuration of a conventional data output buffer. In
FIG. 1
, a pull-up transistor
2
provides an output node
6
with power supply voltage Vddq and a pull-down transistor
4
provides the output node
6
with a ground voltage level GND. The power supply voltage Vddq is a voltage source for the output buffer and the ground voltage level GND is also used for a low voltage level of the output buffer, which are well known to those skilled in the art to which the subject matter pertains. Typically, the pull-up transistor
2
is made up of a PMOS transistor and a pull-down transistor
4
is made up of an NMOS transistor. Further, the output node
6
of the data output buffer is connected to a resistor R and a capacitor C for stabilizing the output signals Dout therefrom. The data output buffer may include separate devices (not shown in
FIG. 1
) for driving the pull-up and pull-down transistors
2
and
4
.
When the pull-up transistor
2
is turned on (while the pull-down transistor
4
is turned off), a high level signal is outputted at the output node
6
and this output signal may corresponds to the power supply voltage Vddq. When the pull-down transistor
4
is turned on (while the pull-up transistor
2
is turned off), a low level signal is outputted at the output node
6
and the low level signal may corresponds to the ground voltage level GND.
However, the conventional data output buffer shown in
FIG. 1
has a problem in that a speed delay is caused by the deficiency of the current drivability in the output terminal consisting of the MOS transistors. This reason for such a speed delay is that the voltage applied from the external circuit is used directly. To solve the problem, the threshold voltage of the MOS transistors has been reduced using manufacturing processes. However, the reduction of the threshold voltage based on these manufacturing processes also causes a latch-up problem and the increase of the processing steps.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a data output buffer having a higher drivability of current in semiconductor devices.
It is another object of the present invention to provide a data output buffer increasing its operation speed without increase in processing steps manufacturing integrated circuits.
It is still another object of the present invention to provide a data output buffer applicable to small-sized integrated circuits, such as semiconductor devices.
In accordance with an aspect of the present invention, there is provided a data output buffer in a semiconductor device comprising: a pull-up means coupled to a power supply for providing an output node of the data output buffer with a first voltage level; a pull-down means for providing the output node of the data output buffer with a second voltage level; a voltage comparing and amplifying means coupled to the output node for comparing an output signals from the output node with the first voltage level and for amplifying a difference voltage between the output signals from the output node and the first voltage level; and a voltage compensating means couple to the voltage comparing and amplifying means for compensating a voltage level of the power supply in response to an output signal from the voltage comparing and amplifying means.
In accordance with another aspect of the present invention, there is provided a data output buffer in a semiconductor device comprising: 1) a plurality of output stages, wherein each output stage includes: a) a pull-up means to provide a corresponding output node with a first voltage level; b) a pull-down means to provide the corresponding output node with a second voltage level; and c) a voltage comparing and amplifying means couple to the corresponding output node for comparing the first voltage level with an output signal from the corresponding output node and for amplifying a voltage difference between the first voltage level and the output signal, and 2) a level compensator for compensating the voltage level of the first voltage level in response to an output signal from the voltage comparing and amplifying means in each output stage.


REFERENCES:
patent: 4539494 (1985-09-01), Kurafuji
patent: 5235219 (1993-08-01), Cooperman et al.
patent: 5412315 (1995-05-01), Tsuda
patent: 5521625 (1996-05-01), Morrison
patent: 5748021 (1998-05-01), Hunt et al.
patent: 56-153836 (1981-11-01), None

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