Fishing – trapping – and vermin destroying
Patent
1987-03-04
1988-07-26
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 30, 437 57, 437228, H01L 21265
Patent
active
047600330
ABSTRACT:
The manufacture of n-channel and p-channel transistors in a CMOS process which involves employing gate spacer oxide layers for of reducing the under-diffusion of the implanted source-drain regions under the gate areas. The spacer oxide widths for the n-channel and the p-channel transistor are set differently so that both transistor types can be optimized independently of one another and without an additional expenditure for more masking steps. The method is employed for the manufacture of large scale integrated circuits for fast switching speeds.
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Hearn Brian E.
McAndrews Kevin
Siemens Aktiengesellschaft
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