Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-03-10
2001-10-16
Vu, Huy D. (Department: 2663)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S535000
Reexamination Certificate
active
06304571
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multiprocessor type exchange, for example, a multiprocessor type asynchronous transfer mode (ATM) exchange.
An exchange is generally constituted provided with a switching apparatus for performing an exchange of cells such as ATM cells communicated among a plurality of pieces of terminal equipment and line apparatuses inserted between this switching apparatus and each of the plurality of pieces of terminal equipment. When a processor is contained in each of these line apparatuses, the exchange is commonly referred to as a “multiprocessor type exchange”.
2. Description of the Related Art
As will be explained in further detail later, the multiprocessor type exchange of the related art is configured by a single call processing processor at the center and a plurality of processors which are closely coupled via a high speed bus. Such a multiprocessor configuration has the following disadvantages.
(i) Parallel access with respect to a plurality of processors cannot be carried out.
(ii) When accesses with respect to a plurality of processors simultaneously occur, the access to one processor starts after the access to another processor is finished, therefore time for useless waiting is unavoidable for the former processor.
(iii) When expanding the scale of the ATM exchange, the length of the high speed bus must be extended along with this. The resultant operational delay time therefore can no longer be ignored.
The above disadvantageous points (i), (ii), and (iii) are inherently predictable. However, if the line speed required for one line apparatus reaches 600 Mbps due to the increase in the scale of multimedia communication in recent years, the above disadvantageous points (i), (ii), and (iii) will actually become serious problems. Therefore, a large scale and high speed multiprocessor type ATM exchange will not be able to be realized.
Therefore, in the past, a procedure for transferring communication information among multiprocessors by using cells transferred in a mode of in-channel in an ATM speech path was proposed (Japanese Unexamined Patent Publication (Kokai) No. 2-123850).
Further, based on the above proposal (Japanese Unexamined Patent Publication (Kokai) No. 2-123850), as an example, an improvement of the multiprocessor type exchange of the related art was proposed (Japanese Unexamined Patent Publication (Kokai) No. 7-177155). According to this proposal, inter-multiprocessor communication for data communication among processors is realized by providing an ATM cell assemble/disassemble apparatus in front of each processor constituting the multiprocessor and, at the same time, providing an ATM cell signal inserting/separating apparatus for demultiplexing or multiplexing ATM cells on the line, transforming the transfer data to be communicated among processors to ATM cells, and carrying out the switching of ATM cells at a speech path side ATM switch.
While the proposal of the above related art realizes inter-processor communication among processors by using ATM cells, in actuality, in a multiprocessor type exchange, it is necessary to simultaneously execute not only the communication among processors mentioned above, but also the inherent communication of information among subscribers by using the ATM cells. That is, a communication means for simultaneously establishing inter-processor communication and inter-subscriber communication is necessary. In addition, there is a problem that this communication means must be realized by extremely simple hardware and control.
SUMMARY OF THE INVENTION
Accordingly, in consideration with the above situation, an object of the present invention is to provide a multiprocessor type ATM exchange capable of realizing inter-processor communication and inter-subscriber communication by extremely simple hardware and control.
To attain the above object, the present invention introduces control information cells and, at the same time, provides in each line apparatus a cell demultiplexing unit for discriminating whether each cell being input is user cell or control information cell and separating the same. Each processor performs the communication with other processors via a switching apparatus using each separated control information cell. According to the present invention, therefore, a multiprocessor type exchange is provided which has a switching apparatus and a plurality of line apparatuses each containing a processor wherein it is possible to eliminate the conventional high speed bus and call processing processor etc. and thereby make parallel access possible and, at the same time, facilitate system expansion.
REFERENCES:
patent: 5663959 (1997-09-01), Nakagawa
patent: 2123850 (1990-05-01), None
patent: 7177155 (1995-07-01), None
patent: 9162890 (1997-06-01), None
Fujitsu Limited
Helfgott & Karas P C
Vu Huy D.
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