Patent
1994-09-19
1998-04-07
Geckil, Mehmet B.
395552, G06F 106
Patent
active
057375895
ABSTRACT:
The timing of digital signal sampling at a receiver is continuously adjusted relative to a master clock used to initiate sending, by controlling a phase difference between the receiver sampling clock and the master clock in accordance with feedback of an error signal determined by detecting deviation of sampling clock timing from desired reference timing during both start-up operation and normal operation. Propagation delay scattering in the individual devices is compensated for by setting the sampling clock at a desired reference timing at start-up. Propagation delay scattering caused by fluctuation during device operation is compensated for by detecting the deviation of the sampling clock timing from reference timing based on received digital signals during normal operation and then continuously correcting the sampling clock timing on the basis of the detection result.
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Doi Toshio
Hayashi Takehisa
Nakano Tetsuo
Geckil Mehmet B.
Hitachi , Ltd.
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