Compression bonded type semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S181000, C257S688000, C257S689000

Reexamination Certificate

active

06303987

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to a compression bonded type semiconductor device for use in power conversion devices including, but not limited to, gate commutated turn-off (GCT) thyristors.
2. Description of the Background
Gate turn-off (GTO) thyristors have been widely used in large-capacity power electronics. However, background GTO thyristors have the following problem. First, snubber circuitry is required, and second, it is difficult to suppress an increase in snubber loss which occurs with an increase in operation voltages thereof. Fortunately, a specific thyristor device, known as a gate commutated turn-off (GCT) thyristor (which is designed to eliminate the use of this snubber circuitry) has been developed, thereby making it possible to achieve enhanced performance. The GCT has a maximum cut-off current of 6,000A, and a turn-off accumulation time of less than or equal to 3 microseconds (&mgr;s).
FIG. 6
is a cross-sectional view of a background compression bonded type semiconductor disclosed in Published Japanese Patent Application No. 8-330572 (1996), and which is designed to include a GCT and its associative gate drive device for controlling the GCT. As shown, a GCT
1
includes a semiconductor substrate
2
. An aluminum gate electrode
2
a
is formed at an outer periphery on a top surface of the substrate
2
, and a cathode electrode
2
b
is formed on an inner periphery of the top surface of the substrate. In addition, an anode electrode
2
c
is formed on a bottom surface of the substrate
2
. A cathode distortion buffer disk
3
and an external cathode electrode
4
are sequentially stacked over each other on the side of the cathode electrode
2
b
. An anode distortion buffer disk
5
and an external anode electrode
6
are sequentially stacked on a side of the anode electrode
2
c
. In addition, the GCT
1
includes a ring gate electrode
7
made of molybdenum, which is in contact with the gate electrode
2
a
of the semiconductor substrate
2
, and a ring-shaped external gate terminal
8
made of either iron or nickel alloy.
An inner periphery of the external gate terminal
8
contacts the ring gate electrode
7
and an outer periphery externally projects from a lateral side of an insulating cylinder
14
. Further, curved portions
8
a
of the external gate terminal
8
are formed inside and outside of the insulating cylinder
14
, and a specified number of attachment holes
8
c
(for example, twenty-four for a GCT of 6 kV/6 kA rating) are formed in connection portions
8
b
. The attachment holes
8
c
are for connecting the external gate terminal
8
to a plate-shaped control gate electrode
18
at equally spaced positions of a concentric pattern.
The GCT
1
also includes an elastic body
9
, which presses the ring gate electrode
7
against the gate electrode
2
a
along with the external gate terminal
8
in cooperation with an annular insulator
10
. Also provided are an insulator
11
, a first flange
12
rigidly secured to the external cathode electrode
4
and a second flange
13
fixed to the external anode electrode
6
. The insulating cylinder
14
is divided into upper and lower portions, and has an outer periphery that projects externally from a lateral side thereof and is rigidly attached by soldering at a divider section
14
a
. In addition, end portions
15
are soldered to the insulating cylinder
14
and then secured to the first flange
12
and second flange
13
, thereby sealing the GCT
1
.
In addition, a stack electrode
16
applies pressure to the GCT
1
and also takes out a current while simultaneously releasing heat from the external cathode electrode
4
and external anode electrode
6
. A plate-shaped control electrode
17
includes an annular metal plate and is disposed concentrically with respect to the external gate terminal
8
. A plate-shaped control gate electrode
18
includes an annular metal plate disposed concentrically with the external gate terminal
8
and is electrically connected to an outer periphery of the external gate terminal
8
at its inner periphery thereof. An insulation sleeve
19
electrically isolates the plate-shaped control electrode
17
and the plate-shaped control gate electrode
18
, and is secured by fasteners
20
. The plate-shaped control electrode
17
and plate-shaped control gate electrode
18
are connected with a gate drive device
21
, which controls the GCT
1
. A holding plate
23
, such as a washer, functions as a distortion correction plate that firmly retains the connection portions
8
b
between the outer periphery of the external gate terminal
8
and the inner periphery of the plate-shaped control gate electrode
18
by use of fasteners
24
at each of the attachment holes
8
c
. Eighteen connection portions
8
b
may be provided for a 6 kV/4 kA-rated GCT (outer size is approximately 147 mm). Alternatively, twenty-four connection portions
8
b
may be used for a 6 kV/6 kA-rated GCT (outer size is about 200 mm).
An operation of the GCT
1
will now be explained. When the GCT
1
is turned on, a gate current is isotropically supplied from the gate drive device
21
to the external gate terminal
8
so the current is fed from the entire periphery thereof. Thus, a main current flows from the external anode electrode
6
toward the external cathode electrode
4
. Alternatively, when the GCT
1
is turned off, a gate current of the reverse direction is supplied, thus rapidly extinguishing the main current. A current fall-down gradient of such a reverse gate current is set at approximately 6,000 A/&mgr;s. This value setting makes it possible to increase the switching rate in cooperation with a rise-up gradient in the turn-on event at about 1,000 A/&mgr;s.
However, the above-discussed background GCT
1
has the following problems.
As the maximum cutoff current increases, an increase in capacity of the GCT results in an increase in a number of segments that are concentrically parallel-connected on the surface of the semiconductor substrate
2
. Thus further leads to an increase in a diameter of the semiconductor substrate
2
and a diameter of the package structure. In addition, the greater the outer diameter, the greater the number of attachment holes are required.
During product test/inspection procedures of the GCT
1
, when the gate drive device
21
is limited in number, product test/inspection processes require repeated exchanges of the GCT
1
. This requires time-consuming processes including complete attachment or detachment of the fasteners
24
to fix the attachment sections
8
b
. For example, in the product test procedure (turn-on test and turn-off test by pulse test/inspection techniques at high temperatures or low temperatures) of a GCT
1
of 6 kV/6 kA ratings, at least three processes of attachment and detachment of twenty-four different clamping parts is required. Even more complex processes and time consumption will be required with a further increased capacity of the GCT.
In addition, the holding plate
23
is designed to function as a distortion corrector plate to retain the contact between the outer periphery of the external gate terminal
8
and the inner periphery of plate-shaped control gate electrode
18
. However, when the holding plate
23
has a relatively small thickness, the resulting pressure near or around a fixation portion of the fasteners
24
tends to become stronger. Thus, a close contact is achieved only at very limited portions adjacent to the fixation part in the connection portions
8
b
. This results in point-to-point or “pin-point” contact. Due to the lack of area contact, it is impossible to take full advantage of the GCT
1
's inherent performance, such as an ability to supply a uniform gate current to the external gate terminal
8
. This causes a serious problem in which the current locally concentrates which can permanently damage the GCT
1
.
In addition, the increase of the switching speed or rate of the GCT
1
has widened the application field of large current controllability in cer

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