Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1999-05-05
2001-11-13
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S623000, C257S757000, C257S760000, C438S694000, C438S780000, C438S697000
Reexamination Certificate
active
06316833
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device with multilevel interconnection structure and a manufacturing method thereof, and more particularly, it relates to a semiconductor device with a multilevel interconnection whose wiring capacitance is reduced and a manufacturing method thereof.
2. Description of the Related Arts
There is observed an effective wherein as the wiring pitch becomes smaller, and the distance between adjacent wires becomes shorter, the wiring capacitance increases as a semiconductor device becomes more minute. When the wiring capacitance increases, the operational speed of a circuit becomes slower, the electric power consumed becomes larger. Therefore, for reducing wiring capacitance, it is required to use a low dielectric constant film as an interlayer insulating film.
An inorganic SOG (Spin-on-glass) such as HSQ (hydrogen silsesquioxane) has a comparatively low dielectric constant of approximately 3.0, and further, it has a thermal resistance of approximately 400° C., and therefore, it is a very useful material. However, the dielectric constant of HSQ is still high when compared with that of an organic film, and it is desired to further lower this dielectric constant of HSQ. As a method to reduce the dielectric constant of an inorganic SOG film, for example, there is a method shown in “Study of Porous Interlayer Insulating Film Material” Aoi, et al. (Proceedings of the 52th symposium on Semiconductor and Integrated Circuits Technology, pp. 62-67 (1997), in which silylation is performed by adding a silylation agent to an SOG solution, coupled with, amine processing the resulting dielectric constant is lowered to approximately 2.3, the diameter of a pore is made fine, and humidity resistance is improved.
However, in the above conventional semiconductor device with multilayer structure, solution processing is troublesome, and there is also a problem in stability of wiring capacitance.
In Japanese Patent Laid-Open Publication No. 8-250490, a method is disclosed, where a thin film of a modified HSQ thin film precursor is coated on a semiconductor substrate with a conductor. This HSQ thin film precursor comprises a hydrogen silsesquioxane resin, and preferably a modifier selected from among the group consisting of alkylalkoxysilane, alkylalkoxysilane fluoride, and a combination thereof. However, the prior art described in this publication also has a weak point because solution processing is troublesome and the stability of wiring capacitance is low.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device with a multilevel interconnection in which the dielectric constant of HSQ is low and wiring capacitance can be reduced, and a manufacturing method thereof.
A semiconductor device with a multilevel interconnection according to the present invention comprises a hydrogen silsesquioxane film made porous by etching with hydrogen fluoride and used as an interlayer insulating film for filling the space between wires.
Another semiconductor device with a multilevel interconnection according to the present invention comprises hydrogen silsesquioxane film made porous by ion-implantation of impurities containing fluorine used as an interlayer insulating film for filling the space between wires.
In this semiconductor device with a multilevel interconnection, it is preferable to perform said ion-implantation of impurities containing fluorine under the condition of 10 to 30 keV and 1×10
14
to 3×10
15
cm
−2
.
A manufacturing method of a semiconductor device with a multilevel interconnection according to the present invention comprises the steps of disposing a hydrogen silsesquioxane film so as to fill the space between wires, baking the hydrogen silsesquioxane film, and implanting impurities containing fluorine by ion-implantation.
In this manufacturing method of a semiconductor device with a multilevel interconnection, it is preferable to perform said ion-implantation of impurities containing fluorine under the condition of 10 to 30 keV and 1×10
14
to 3×10
15
cm
−2
.
According to the present invention, the dielectric constant of an HSQ film is low, and wiring capacitance can remarkably be reduced. Furthermore, according to the present invention, HSQ is made porous by etching of hydrogen fluoride or ion-implantation of impurities containing fluorine, and therefore the processing is extremely easy.
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“Porous SOG for Intermetal Dielectrics” Aoi et al; Proceedings of the 52th Symposium on Semiconductor and Integrated Circuits Technology; pp. 62-67; Jun. 1997.
Abraham Fetsum
Hayes, Soloway, Hennessey Grossman & Hage, P.C.
NEC Corporation
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