Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements
Reexamination Certificate
1998-11-03
2001-12-04
Nguyen, Cao H. (Department: 2173)
Computer graphics processing and selective visual display system
Display driving control circuitry
Controlling the condition of display elements
C345S506000
Reexamination Certificate
active
06326984
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to video graphics processing and more particularly to a method and apparatus for storing and displaying video image data in a video graphics system.
BACKGROUND OF THE INVENTION
Video information and graphical information are being combined in an increasing number of applications. Examples include video displays with animated graphical icons, on-screen menus, or a pop-up world-wide web browser. In these applications, the processing circuitry must accommodate both the video information and the graphical information. Because both of these portions of the system can consume large amounts of system bandwidth, speed limitations within the system can corrupt the video and/or graphical information when it is displayed.
For example, when a system displays video information that is stored in a memory structure and also displays graphical information stored in the memory structure, bandwidth limitations on the memory can cause bottlenecks which lead to corruption of the display. In typical mixed video and graphics systems, video information is the first priority, as corruption within the video data stream is more noticeable and difficult to correct. In order to allow the video information and the graphical information within the system to be processed effectively and quickly such that corruption does not result, efficient use of existing bandwidth is essential.
For example, in a system that includes MPEG video streams that require a great deal of fetching from the memory in order to generate successive images, the amount of bandwidth consumed by the processing activities can be substantial. Combining this processing intensive bandwidth with the storage of an incoming video data stream, incoming graphics images, and the fetching of these various images for display makes efficient use of the limited memory bandwidth critical. In systems that display video information in real time, overloading memory bandwidth can starve one or more blocks in the system, causing images to be lost or corrupted on the display.
In prior art systems, these bandwidth considerations were not as paramount as video information and graphical information were often sourced separately and combined in a different manner that was less intertwined. In such cases, bandwidth limitations of a memory would only effect one or the other of the two data sources. However, in current systems which attempt to more fully integrate the video and graphics information storage and processing, these bandwidth limitations are magnified as both sets of data must be handled by the same processing system.
Although one solution to such a problem might include expanding the bandwidth of the memory either by adding additional individual memory blocks or increasing the number of access ports or processors dealing with the memory, these solutions increase costs. These costs are incurred both in additional die area on the integrated circuit, and also in the additional complexity added to the system. As video graphics circuits continue to evolve, integration of the video processing and graphics processing portions of the system are important for both economic and functional reasons. For this reason, expanding the bandwidth of the memory through the addition of more memory or additional ports is undesirable.
Therefore a need exists for a method and apparatus for storing and displaying video image data in a video graphics system which reduces the amount of memory bandwidth required while allowing the image data to be fetched and displayed without corruption.
REFERENCES:
patent: 5854620 (1998-12-01), Mills et al.
patent: 5938756 (1999-08-01), Van Hook et al.
patent: 5949428 (1999-09-01), Toelle et al.
patent: 5973696 (1999-10-01), Agranat et al.
Chow Paul
Mizuyabu Carl K.
Porter Allen J.C.
Swan Philip L.
Wang Chun
ATI International SRL
Nguyen Cao H.
Vedder Price Kaufman & Kammholz
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