Metal working – Barrier layer or semiconductor device making
Reexamination Certificate
1995-01-11
2001-02-20
Graybill, David E. (Department: 2814)
Metal working
Barrier layer or semiconductor device making
Reexamination Certificate
active
06190424
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a technique for processing an object to be treated in a plurality of processes and more particularly to a technique for processing semiconductor wafers.
Semiconductor integrated circuit devices, such as logic ICs, memory ICs and one-chip microcomputers, are fabricated by forming semiconductor circuit elements into a silicon wafer through diffusion, wiring and other processes and dividing the wafer into single semiconductor integrated circuit devices (individual semiconductor chips).
The wafer manufacturing process to build semiconductor circuit elements into a semiconductor wafer basically comprises: a cleaning process to clean the surface of the wafer; an oxidation process to form a uniform oxidized film over the wafer surface; a diffusion process to diffuse impurity atoms into the silicon substrate; and a photo-etching process that, after transferring a desired device pattern onto the photoresist, performs an etch on the photoresist to form a target pattern. These processes are repetitively performed on the semiconductor wafer a number of times.
To manufacture a semiconductor integrated circuit device based on a circuit pattern whose design was completed in the previous step, apparatuses that perform the above-mentioned processes, such as a cleaning equipment, an oxidation equipment, a low-pressure CVD equipment, and a photo-etching equipment, are constructed in the same way as in the actual production line. Then, a sample or experimental product of the semiconductor wafer is made by using the production line thus set up and is subjected to tests such as a circuit operation test to check the sample wafer, followed by the mass production of the semiconductor wafer. If the tests have found that the prepared production line cannot produce a desired product, the conditions of each process are adjusted and another sample is manufactured.
In building the production line, it is preferred to set the layout of each process so that the processing time of each process for one wafer is almost equal. In the low-pressure CVD equipment used in the production line, for example, 100 wafers are processed in a batch, which takes about four hours. Hence, the processing time for one wafer is about 2 and a half minutes.
In the photolithography apparatus that transfers a device pattern onto the photoresist, about 25 wafers are set in the apparatus and processed one at a time. The processing time for each wafer is about 2-3 minutes.
To fabricate a sample wafer, the steps involve, as mentioned above, first setting up a production line, operating the production line under the same condition as when manufacturing the actual production type wafer, and then inspecting the sample. Thus, the inspection can be made of the sample wafer if one semiconductor wafer is obtained. To reproduce the same conditions as those when processing the production type wafers, however, the same number of sample wafers as the number of production type wafers that would be processed in the actual production line are processed taking the time normally spent to process 100 wafers.
SUMMARY OF THE INVENTION
For this reason, it takes long for the processing to be completed even when it is desired to have a small number of wafers and inspect them quickly, as when manufacturing the sample wafers.
On the other hand, even in processes such as the oxidation process and low-pressure CVD process that allow a batch processing, the wafers can be processed one at a time. For example, when the low-pressure CVD processing is performed on a one-by-one basis, the processing can be finished in about 15 minutes, which means a longer processing time per wafer than that taken by the batch processing.
This inventor examined the processing line for the semiconductor wafers. The outline of the technique examined by this inventor is described below.
That is, if the processing that is performed on a batch basis for the production type wafers is changed to a one-by-one-mode processing, it is found that although the processing time per wafer in each process becomes longer, the total processing time required to finish the complete wafer processing can be shortened. Therefore, besides the production line, a sample making line may be built to allow the equipment that performs a one-by-one-mode processing for the production type wafers to be shared by both of the lines, thereby realizing a substantial reduction in the processing time for the sample wafers.
Further, while the production line is in operation, the one-by-one-mode processing that makes up the production line may be used to make a sample wafer of a different type than the production type. Moreover, the sample making line arranged by the side of the production line may be used also as a production line for fabricating ASIC wafers such as gate arrays and standard cells, thereby making it possible to put different types of wafers on the production lines and fabricate them at the same time.
An object of this invention is to provide a processing system and a processing method, in which a sample making line built by the side of the production line for mass-producing products shares with the production line a variety of processing sections that make up the production line.
Another object of this invention is to provide a processing system and a processing method, which include a first line for processing one kind of objects and a second line for another kind of objects that shares with the first line the processing sections making up the first line, so as to process fixed flows of different kinds of objects fed on the production lines.
Representative aspects of this invention may be briefly summarized as follows.
The processing system has a main processing line for processing main objects and a sub-processing line for processing sub-objects. The main processing line comprises: a plurality of main batch processing sections, each of which processes a plurality of main objects; and a plurality of main sequential processing sections, each of which processes a minimum number of main objects. The main objects are supplied to the main batch processing sections and the main sequential processing sections in a predetermined order where they are subjected to predetermined processing. The sub-processing line comprises: a plurality of sub-processing sections, each of which performs processing identical with that of the corresponding main batch processing section on a minimum number of sub-objects; and the main sequential processing sections. The sub-objects are supplied to the sub-processing sections and the main sequential processing sections in a predetermined order where they are subjected to predetermined processing.
In another aspect, the main processing line comprises: a plurality of main objects-dedicated processing sections, each of which processes a plurality of main objects at a time; and a common sequential processing section which divides the main objects into minimum-number groups and processes one group of the main objects at a time and at the same time processes a minimum number of sub-objects; wherein the main objects are transported along the main line in a predetermined order. The sub-processing line comprises: a plurality of sub-objects-dedicated processing sections, each of which performs processing identical with that of the corresponding main objects-dedicated processing section on a minimum number of sub-objects; and the common sequential processing section; wherein the sub-objects are supplied to the sub-objects-dedicated processing sections and the common sequential processing section in a predetermined order.
The sub-processing line—which comprises a plurality of main sequential processing sections making up the main processing line and a plurality of sequential sub-processing sections—is totally of the sequential processing type. This sub-processing line processes an object as a sample of the product which will later be mass-produced on the main processing line. Based on the result of the sample product experimentally manufacture
Beall Law Offices
Graybill David E.
Hitachi , Ltd.
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