Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Reexamination Certificate
1998-06-24
2001-02-13
Le, Que T. (Department: 2878)
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
C250S214100
Reexamination Certificate
active
06188056
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to pixel designs for solid state imagers. More specifically, the present invention relates to pixel designs having one or more access transistors and a photosensitive resistive load located above the access transistors.
CMOS image sensors are now becoming competitive with charge coupled device (“CCD”) image sensors. Potential applications include digital cameras, night time driving displays for automobiles, and computer peripherals for document capture and visual communications.
Since the 1970s, CCD arrays have dominated the electronic image sensor market. They have outperformed CMOS array sensors in most important criteria including quantum efficiency, optical fill factor (the fraction of a pixel used for detection), charge transfer efficiency, readout rate, readout noise, and dynamic range. However, the steady improvement in CMOS technology (including increasingly small device size) has moved CMOS image sensors into a competitive posture. Further, in comparison to CCD technology, CMOS technology provides lower power consumption, increased functionality, and potentially lower cost. Researchers now envision single chip CMOS cameras having (a) integrated timing and control electronics, (b) a sensor array, (c) signal processing electronics, (d) an analog-to-digital converter, and (e) interface electronics. See Fossum, “CMOS Image Sensors: Electronic Camera On A Chip,” IEDM Technical Digest, pp. 17-25, December 1995, which is incorporated herein by reference for all purposes.
CCD arrays are limited in that all image data is read by shifting analog charge packets from the CCD array interior to the periphery in a pixel-by-pixel manner. The pixels of the CCD array are not randomly addressable. In addition, due to voltage, capacitance, and process constraints, CCD arrays are not well suited to integration at the level possible in CMOS integrated circuits. Hence, any supplemental processing circuitry required for CCD sensors (e.g., memory for storing information related to the sensor) must generally be provided on separate chips. This, of course, increases the system's cost.
A conventional CMOS pixel, as illustrated in
FIG. 1
(in top view) and described in the above-mentioned Fossum reference, includes one or two pass transistors
5
and
7
(shown as polysilicon gate strips) and a junction diode
11
(shown as a diffusion region in a semiconductor substrate). Regardless of how the signal is read (charge or voltage sensing, active or passive photodiode), the principle of a pixel's operation is based on the reverse biased junction capacitance modulation by light. Photons absorbed in the depletion region of the pre-charged (reverse biased) junction generate electron-hole pairs which discharge the capacitor. Larger junctions collect more photons and are more sensitive, but reduce the resolution of a sensor (as fewer pixels can be placed on available surface area). The lower limit of junction size is the diffraction limit of light.
As shown, access transistor(s)
5
and
7
and junction diode
11
are disposed side-by-side, essentially in the same plane, on the silicon substrate surface. Since the capacitance of the junction in a given technology can be easily set to a required value only by changing its dimensions, the pixel size is largely predetermined by the size of the junction. While the pixel size may be reduced slightly by making the access transistor(s) smaller, and thereby increasing the optical fill factor (the ratio of the pixel active area to the total pixel area), the transistors still limit the fill factor.
In the drive to further miniaturize electronic components including detectors/sensors, the current CMOS photodetector pixel design presents a significant limitation. What is needed therefore is an improved image sensor design that increases the optical fill factor of pixels in CMOS image arrays.
SUMMARY OF THE INVENTION
The present invention provides an image sensor including pixels which occupy a reduced area on the sensor surface. Such pixels include one or more access transistors and a photosensitive resistive element. This element may be formed at a level on the chip above the access transistor(s), thereby providing a stacked arrangement in which the pixel surface area is more fully occupied by a photosensitive element. In some pixel designs, the fill factor may approach about 100 percent.
One specific aspect of the invention is a photosensitive pixel formed on a semiconductor substrate. The pixel may be characterized as including the following features: (a) at least one access transistor located at a first level; and (b) a radiation-sensitive resistive element located at a second level and coupled to the access transistor. The radiation-sensitive resistive element will generally have an exposed surface accessible to radiation, such the radiation-sensitive resistive element undergoes a change in resistance when the pixel is exposed to radiation of a defined intensity.
The radiation-sensitive resistive element may include a body region having a first resistivity and is straddled by two head regions having a second resistivity which is lower than the first resistivity. In a preferred embodiment, the radiation-sensitive resistive element is doped polysilicon having a dopant concentration of up to about 1×10
18
atoms/cm
3
. For many applications, the radiation-sensitive resistive element has resistance in the dark of at least about one gigaOhm.
The photosensitive pixel may be implemented as a passive pixel or an active pixel, depending on whether it includes an amplifier. A passive implementation of the pixel includes a capacitor having plates connected through the radiation-sensitive resistive element, whereby the amount of radiation striking the radiation-sensitive resistive element controls the rate at which the capacitor discharges. An active implementation of the pixel includes an operational amplifier having a gain control loop including the radiation-sensitive resistive element, whereby the gain of the operational amplifier is a function of the radiation striking the radiation-sensitive resistive element.
A preferred application of the photoresistive pixels of this invention is in the context of an imager such as a CMOS imager used in digital cameras or video equipment. Devices for such applications may include an array of such pixels which provide output signals indicative of physical stimuli to which the detectors have been exposed. Collectively these output signals define an image. Preferably, the imager includes an analog-to-digital converter which receives analog output signals from the array of pixels. An integrated circuit may include both the array of detectors and the analog-to-digital converter on a single semiconductor substrate. Preferably, the pixels of the array are separately addressable.
Yet another aspect of the invention provides a system for producing an image of an object. This system includes an imager including pixels having the structure described above and one or more components for outputting an image resulting from outputs of the pixels. The image may be a photograph in the case of a digital camera for example. The output device may be a computer display device for example.
These and other features and advantages of the invention will be described below in the Detailed Description section with reference to the appended drawings.
REFERENCES:
patent: 3210548 (1965-10-01), Morrison
patent: 4461956 (1984-07-01), Hatanaka et al.
patent: 4803375 (1989-02-01), Saito et al.
Bryant Frank Randolph
Kalnitsky Alexander
Sabatini Marco
Galanthay Theodore E.
Jorgenson Lisa K.
Le Que T.
STMicroelectronics Inc.
Weaver Jeffrey K.
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