High-speed CMOS multiplexer

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Converging with plural inputs and single output

Reexamination Certificate

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Details

C327S407000

Reexamination Certificate

active

06194950

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to multiplexers and, more particularly, to a complementary metal-oxide semiconductor (CMOS) time-division multiplexer constructed using only one- and two-transistor inverters and pass-gates.
2. Description of the Related Art
Time-division multiplexers are crucial components in electronic systems, especially for the transmission of multiple data signals on a single data transmission line. Various time-division multiplexers have been designed and demonstrated in Si-Bipolar or Heterojunction Bipolar technologies that are capable of operation at frequencies in excess of tens of Gigabits per second (Gbps). However, it is desirable to implement all of the circuits of a given electronic system in a common technology platform to reduce overall system cost. Since integrated CMOS technology is a common choice for implementing low cost electronics, a fast multiplexer designed purely in CMOS technology is highly desirable. It is further desirable to construct an integrated CMOS multiplexer using a minimum number of transistors.
SUMMARY OF THE INVENTION
The present invention provides a four-to-one (“4:1”) multiplexer circuit designed purely in CMOS and having a minimal number of transistor devices. In accordance with the present invention, a 4:1 CMOS multiplexer having an on-chip voltage controlled oscillator (VCO), frequency divider circuits, and two stages of two-to-one multiplexers is fabricated using only inverters and pass-gates. The resulting multiplexer is advantageously simpler and inexpensive to fabricate and operates faster than any known similarly fabricated and constructed CMOS multiplexer.
The inventive multiplexer may be constructed using 0.8 &mgr;m pitch linewidth or finer CMOS technology and is operable at speeds in excess of approximately 2 Gbps. The present invention may be particularly useful for high-speed data communications systems and devices and also for high-speed optoelectronic-VLSI systems that employ fast optical data transmission.
Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention.


REFERENCES:
patent: 4106278 (1978-08-01), Yasuda
patent: 5243599 (1993-09-01), Barrett et al.
patent: 5365204 (1994-11-01), Angiulli et al.
patent: 5726990 (1998-03-01), Shimada et al.
patent: 5912591 (1999-06-01), Yamada
patent: 5955912 (1999-09-01), Ko

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