Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1999-05-26
2001-12-25
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S774000, C438S624000, C438S734000
Reexamination Certificate
active
06333558
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating the same, and more particularly relates to a semiconductor device in which an inorganic insulating film is provided on a low-dielectric-constant film having a relative dielectric constant in the range of from 1.0 to 3.0 and a hole pattern which passes through at least the inorganic insulating film is formed, and to a method for fabricating the same.
2. Description of the Related Art
As semiconductor devices are miniaturized, the interconnecting line widths must be miniaturized and spaces between lines must be reduced. At the same time, with there being demand for low electric power consumption and faster performance, interlayer insulating films are required to have lower dielectric constants. In particular, in logic devices, since increases in resistance and capacitance between lines due to miniaturized lines result in degradation in signal transmission speed, fine multi-layer wiring having a low-dielectric-constant film as an interlayer insulating film is required.
The miniaturized line width and reduced spaces between lines increase not only the slenderness ratio of lines but also the aspect ratio of spaces between lines, and therefore, a technique for forming slender fine lines, a technique for filling fine spaces between lines with interlayer insulating films, and the like must be adopted, resulting in complex processes and increased numbers of processes.
In accordance with a damascene process in which a via hole and a trench are embedded at the same time by aluminum reflow sputtering, and excess aluminum is polished by chemical mechanical polishing (hereinafter referred to as “CMP”) to form an aluminum plug in the via hole and to form an aluminum line in the trench, the number of processes can be greatly decreased because it is not required to form an aluminum line having a high aspect ratio by etching or to fill narrow spaces between lines with an interlayer insulating film. The damascene process greatly contributes to cost reductions as the aspect ratio of lines increases and the number of lines increases.
On the other hand, an interlayer insulating film having a lower dielectric constant decreases capacitance between lines. However, a low-dielectric-constant film having a relative dielectric constant of 3.0 or less to be applied to devices below the 0.18 &mgr;m rule has a film quality which differs greatly from that of a silicon oxide film which is used in conventional devices. Therefore, the development of process techniques for low-dielectric-constant films is sought.
However, since most of the low-dielectric-constant films having a relative dielectric constant of 3.0 or less are composed of an organic material and have low heat resistance, gases are generated at low temperatures (200 to 400° C.). The generation of gases does not occur in silicon-based insulating films which have been conventionally used as interlayer insulating films.
Generally, after via holes and trenches are formed in an interlayer insulating film which uses a low-dielectric-constant film, plugs, lines, and the like are formed within the via holes and the trenches. At this stage, a gas released from the low-dielectric-constant film affects the formation process of a metal film which constitutes lines and the like, and, for example, embedding defects are caused. The gas is released from the low-dielectric-constant film, not because of the decomposition of the low-dielectric-constant film, but because of deterioration such as oxidation. Therefore, the gas is generated at a temperature that is lower than the temperature at which the low-dielectric-constant film originally resists heat. For example, although a fluorinated polyarylether-based resin such as FLARE (trade name) has a glass transition temperature of approximately 400° C. and a thermal decomposition temperature of approximately 500° C., a very small amount of gas is generated at temperatures of approximately 200 to 400° C.
The very small amount of gas is generated mainly in a region in which the pattern density is low, resulting in defects. That is, a silicon-based insulating film formed on a low-dielectric-constant film functions as a so-called “lid”, and in a region in which the pattern density of via holes and trenches is low, since an area of the open low-dielectric-constant film is small. the flow rate of the released gas per via hole or trench increases and defects occur therein.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device and a method for fabricating the same, in which the problems described above are solved. In one aspect, in accordance with the present invention, a semiconductor device includes an inorganic insulating film provided on a low-dielectric-constant film having a relative dielectric constant in the range of from 1.0 to 3.0 and a hole pattern which passes through at least the inorganic insulating film. The semiconductor device further includes a dummy hole pattern which passes through the inorganic insulating film. The dummy hole pattern is formed in a region in which the pattern density of the hole pattern is low.
In the semiconductor device, since the dummy hole pattern which passes through the inorganic insulating film is formed in a region in which the pattern density of the hole pattern is low, gas released from the low-dielectric-constant film is emitted through the hole pattern and the dummy hole pattern. Thus, since the released gas is also dispersed into the dummy hole pattern and is not concentrated in the hole pattern, the amount of gas released from the low-dielectric-constant film per hole pattern is decreased.
In another aspect, in accordance with the present invention, a method for fabricating a semiconductor device includes the steps of: forming an inorganic insulating film on a low-dielectric-constant film having a relative dielectric constant in the range of from 1.0 to 3.0; forming a hole pattern which passes through the inorganic insulating film; and forming a dummy hole pattern. Preferably, the dummy hole pattern is formed in a region in which the pattern density of the hole pattern is low.
In the method for fabricating the semiconductor device, since the dummy pattern which passes through the inorganic insulating film is formed in a region in which the pattern density of the hole pattern is low, gas released from the low-dielectric-constant film is emitted through the hole pattern and the dummy hole pattern. Therefore, since the released gas is also dispersed into the dummy hole pattern and is not concentrated in the hole pattern, the amount of gas released from the low-dielectric-constant film per hole pattern is decreased.
REFERENCES:
patent: 5556812 (1996-09-01), Leuschner et al.
patent: 6069400 (2000-05-01), Kimura et al.
Kananen Ronald P.
Potter Roy
Rader & Fishman & Grauer, PLLC
Sony Corporation
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