Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2000-01-28
2001-05-15
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S778000, C257S686000, C257S723000, C257S784000, C257S737000, C257S738000, C257S780000, C257S659000, C257S660000, C257S690000, C257S691000, C257S685000
Reexamination Certificate
active
06232668
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device of chip-on-chip structure in which semiconductor chips are bonded to each other in a stacked relation, and to a semiconductor chip for use in such a semiconductor device.
2. Description of Related Art
Semiconductor devices of chip-on-chip structure have been proposed, in which a pair of semiconductor chips are disposed in an opposed relation and electrically connected to each other via bumps. However, the semiconductor devices have many problems to be solved for practical applications.
The chip-on-chip structure is expected to reduce the areas of wiring boards to be incorporated in various electronic systems for size reduction of these systems, as compared with a case where the chips are individually packaged in single-chip packages. For electronic systems such as mobile phones which handle high frequency signals, however, it is important to take protective measures against noises, so that a shielding member should additionally be provided for shielding the entire wiring board. Therefore, it is impossible to achieve drastic size reduction of the systems simply by employing the chip-on-chip structure.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device of chip-on-chip structure with an effective anti-noise consideration, and a semiconductor chip for use in such a semiconductor device.
The semiconductor chip according to the present invention for use in a semiconductor device of chip-on-chip structure in which a second semiconductor chip is stacked on the semiconductor chip and bonded to a surface of the semiconductor chip comprises: chip interconnection portions provided on the surface of the semiconductor chip for electrical connection to the second semiconductor chip; and a shielding conductive portion provided on the surface of the semiconductor chip as surrounding the chip interconnection portions, and connected to a low impedance portion.
With this arrangement, the shielding conductive portion surrounds the chip interconnection portions on the surface of the semiconductor chip, thereby preventing external noises from reaching the chip interconnection portions. Where the semiconductor device of chip-on-chip structure is produced by bonding the second semiconductor chip onto the semiconductor chip in a stacked relation, there is no need to additionally provide a noise shielding mechanism.
Further, the respective semiconductor chips are supported by the shielding conductive portion, whereby stresses exerted on the semiconductor chips by resin sealing can be distributed therethrough. Therefore, deformation of the semiconductor chips can be prevented which may otherwise occur due to a mechanical pressure and a stress/strain. Thus, the semiconductor device of chip-on-chip structure can have stable device characteristic properties.
Particularly, where the chip interconnection portions are generally evenly arranged in a bonding surface area of the semiconductor chip onto which the second semiconductor chip is bonded, the deformation of the semiconductor chip due to the mechanical pressure and the stress/strain can more effectively be prevented.
The chip interconnection portions and the shielding conductive portion may be comprised of metal protuberances formed on the surface of the semiconductor chip. The metal protuberances may be so-called bumps which are formed, for example, by metal plating, or metal deposition films which have a height smaller than the bumps.
The chip interconnection portions and the shielding conductive portion are preferably composed of the same material.
With this arrangement, the chip interconnection portions and the shielding conductive portion can be formed in a single process step, so that the production process is simplified.
The semiconductor device of the present invention, which includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip and bonded onto a surface of the first semiconductor chip, comprises: chip interconnection portions provided between opposed surfaces of the first and second semiconductor chips for electrical connection between the first semiconductor chip and second semiconductor chip; and a shielding conductive portion provided between the opposed surfaces of the first and second semiconductor chips as surrounding the chip interconnection portions, and connected to a low impedance portion.
REFERENCES:
patent: 5677575 (1997-10-01), Maeta et al.
patent: 5757078 (1998-05-01), Matsuda et al.
patent: 5821625 (1998-10-01), Yoshida et al.
patent: 5869903 (1999-02-01), Nakatani et al.
patent: 359043553 (1984-03-01), None
patent: 403011739 (1991-01-01), None
Hikita Junichi
Mochida Hiroo
Loke Steven
Parekh Nitin
Rader Fishman & Grauer
Rohm & Co., Ltd.
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