Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
1999-06-07
2001-12-04
Nelms, David (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185010, C365S185040
Reexamination Certificate
active
06327186
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory whereby data is stored by accumulating or not accumulating charges into a floating gate, and more particularly, to a non-volatile semiconductor storage device whereby prescribed initial data can be read out again, even after a normal writing or erasing operation is executed.
2. Description of the Related Art
An EEPROM including memory cells each having a floating gate is employed as a non-volatile semiconductor storage device to store data or program to be stored for a long time, because storage data or program is not lost even when a power is OFF. The EEPROM is also employed as a flash memory which can erase data in each prescribed block. For example, the flash memory is employed as a memory for program built-in a micro-processor.
To write data or program in a non-volatile semiconductor storage device (hereinafter it called a flash memory, for example, for simplicity) built in a micro processor and so on, there are various methods, for example: first is to write data or program by employing an externally provided writing device, second is to write a boot program once by employing an externally provided writing device and to write (down load) the original data or program by the use of the written boot program after that; and third is to provide a ROM storing the above-described boot program and employ the boot program stored in the ROM so as to write (down load) the original data or program into the flash memory, and so on.
The first method can not be used in real because of the many steps necessary for writing data or program. Additionally, the third method must be avoided, since the additional ROM for storing the boot program to down load data or program must be provided. Therefore, the second method is most effective and lower cost.
However, in order to down load data or program having large capacity by employing a capacity of flash memory to the maximum, the data or program must be over-written in an area storing the prescribed boot program. Since the boot program will never be used after down loading the data or program once, there is no problem to over-write the data or program in the boot program area.
However, it can happen that the written data or program should be changed after over-writing it in the area storing the boot program. Or it also can happen that some operations failures occur during down loading data or program, then, the down loading can not be properly completed. In these cases, since the boot program is already erased, even though it is necessary to down load the data or program again, the boot program for down loading does not exist, thus the data or program can not be written to a micro processor.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a non-volatile semiconductor memory wherein initial data can be read out after erasing the initial data, such as a boot program, by mistake.
It is another object of the present invention to provide a non-volatile semiconductor memory wherein memory cells can be returned to a state before over-writing, even after over-written prescribed data, so that the storage data before over-writing can be read out.
It is further object of the present invention to provide a micro processor having a non-volatile semiconductor memory to achieve the above-described objects.
According to the present invention, the above-described objects can be achieved by a semiconductor memory including: memory cells for storing data by accumulating or not accumulating charges, such as electrons, into floating gate; wherein the memory cell includes first memory cells having first charge exchange capability with respect to a charge exchange for the floating gate, and second memory cells having second charge exchange capability, so that data to be returned can be stored. In the semiconductor storage device according to the present invention, when all erase or all write (program) is performed to the memory cells, the first memory cells become to have a different threshold voltage from the second memory cells according to the different charge exchange capability of the memory cells, thus data to be returned can be read out.
To achieve the above-described objects, according to the first aspect of the present invention, a non-volatile semiconductor memory including plural memory cells for storing data by accumulating charges into a floating gate, comprises: a first memory cell group including memory cell having first charge exchange capability and a second memory cell group including memory cell having second charge exchange capability higher than the first charge exchange capability.
In the above-described invention, according to one embodiment, the memory cell is formed at a surface of a first conductive type semiconductor substrate, and the memory cell includes second conductive type source and drain regions formed at the surface of the semiconductor substrate, a floating gate formed over a first conductive type channel region between the source and drain regions, and a control gate formed over the floating gates, wherein the channel region of the memory cell in the first memory cell group has different impurity concentration than the channel region of the memory cell in the second memory cell group.
Additionally, in the above-described invention, according to one embodiment, the memory cell includes a control gate over the floating gate, the memory device further comprises a read level generator for applying a first read electric potential to the control gate during a first read operation, and applying a second read electric potential different from the first read electric potential to the control gate during a second read operation different from the first read operation.
To achieve the above-described objects, according to the second aspect of the present invention, a non-volatile semiconductor memory including plural memory cells for storing data by accumulating charges into floating gates, comprises a first memory area including first memory cells having first charge exchange capability with respect to a charge exchange to the floating gate, and second memory cells having second charge exchange capability higher than the first charge exchange capability, and a second memory area including memory cells having either the first or second charge exchange capability.
In the above-described invention, according to an embodiment, the memory cell includes a control gate over the floating gate, wherein the first data is read by applying a first read-out electric potential to the control gate during a first reading, and second data according to a state of accumulated charges in the floating gate is read by applying a second read-out electric potential different from the first read electric potential to the control gate during a second reading different from the first reading.
In the above-described invention, according to an embodiment, the first data includes an error detection code, the first data is read out by employing the error detection code during the first data reading.
To achieve the above-described objects, according to another aspect of the present invention, a micro processor includes a non-volatile memory area having plural memory cells for storing data by accumulating charges in floating gate, wherein the non-volatile memory area comprises a first memory area including first memory cells having first charge exchange capability with respect to a charge exchange for the floating gate, and second memory cells having second charge exchange capability higher than the first charge exchange capability, and a second memory area including memory cells having either the first or second charge exchange capability, wherein a boot program is recorded in the first memory area according to a combination of the first and second memory cells.
According to the present invention, it becomes possible to return a boot program even after over-writing.
REFERENCES:
patent: 5504760 (1996-04-01),
Fujitsu Limited
Le Thong
Nelms David
Staas & Halsey , LLP
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