Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
1998-02-02
2001-05-01
Ostrager, Allen M. (Department: 3205)
Abrading
Abrading process
Glass or stone abrading
C451S036000, C451S285000
Reexamination Certificate
active
06224466
ABSTRACT:
TECHNICAL FIELD
This invention pertains to methods of polishing materials in semiconductor assemblies and to methods of slowing a rate of material removal of a polishing process during formation of semiconductor assemblies.
BACKGROUND OF THE INVENTION
In modern semiconductor device applications, hundreds of individual devices may be packed onto a single small area of a semiconductor substrate. Many of these individual devices may need to be electrically isolated from one another. One method of accomplishing such isolation is to form a trenched isolation region between adjacent devices. Such trenched isolation region will generally comprise a trench or cavity formed within the substrate and be filled with an insulative material, such as silicon dioxide.
Prior art methods of forming trench structures are described with reference to
FIGS. 1-4
. Referring to
FIG. 1
, a semiconductor wafer fragment
10
is shown at a preliminary stage of a prior art processing sequence. Wafer fragment
10
comprises a semiconductive material
12
upon which is formed a layer of oxide
14
, a layer of nitride
16
, and a patterned layer of photoresist
18
. Nitride layer
16
comprises an upper surface
17
, upon which photoresist layer
18
is supported. Semiconductive material
12
commonly comprises monocrystalline silicon which is lightly doped with a conductivity enhancing dopant.
Referring to
FIG. 2
, patterned photoresist layer
18
is used as a mask for an etching process. During the etch, unmasked portions of nitride layer
16
, oxide layer
14
, and semiconductive material
12
are removed to form a trench
20
extending within the semiconductive material
12
.
Referring to
FIG. 3
, photoresist layer
18
is removed. Subsequently, an oxide fill layer
24
is formed over nitride layer
16
and within trench
20
.
Referring to
FIG. 4
, layer
24
is removed, generally by an abrasion technique such as chemical-mechanical polishing (CMP), inwardly to about upper surface
17
of nitride layer
16
. Such polishing forms an oxide plug
26
within the semiconductor material
12
.
A difficulty of polishing processes can be in stopping the polishing process at a desired level, such as at about upper surface
17
. It would therefore be desirable to develop improved polishing processes, and to apply such polishing processes toward developing improved processes of forming field isolation regions.
SUMMARY OF THE INVENTION
The invention encompasses polishing processes, methods of polishing materials, methods of slowing a rate of material removal of a polishing process, and methods of forming trench isolation regions.
In one aspect, the invention encompasses a method for polishing a material in which the material is formed over a surface of a substrate. A chemical composition and a substantially non-porous polishing pad are provided proximate to the material. The material is substantially wettable to the chemical composition, while the substrate surface and substantially non-porous polishing pad are substantially non-wettable to the chemical composition. The material is polished with the substantially non-porous polishing pad and chemical composition to expose at least some of the surface of the substrate.
In another aspect, the invention encompasses a method for slowing a rate of material removal of a polishing process at a surface. A first layer having an upper surface is formed over a substrate. A second layer is formed over the first layer upper surface. The second layer is more hydrophilic than the first layer. After the second layer is formed, a substantially non-porous hydrophobic material polishing pad and a water-comprising chemical composition are utilized to polish to the first layer upper surface.
In yet another aspect, the invention encompasses a method of forming a trench isolation region. A first silicon dioxide layer is formed over a semiconductive material substrate. A polysilicon layer having an upper surface is formed over the first silicon dioxide layer. An opening is formed through the polysilicon layer, through the first silicon dioxide layer, and into the semiconductive material substrate. A second layer of silicon dioxide is formed within the opening and over the polysilicon layer upper surface The second layer of silicon dioxide substantially completely fills the opening. The second layer of silicon dioxide is polished from over the polysilicon layer upper surface utilizing a substantially non-porous hydrophobic material polishing pad and a water-comprising chemical composition. The polishing removes the silicon dioxide at a material-removal rate. The material-removal rate slows upon reaching about the polysilicon layer upper surface. After the polishing, a plug of silicon dioxide remains within the opening in the semiconductive substrate. The plug is a trench isolation region.
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Cheng, J., et al., “A Novel Planarization of Trench Isolation Using a Polysilicon Layer As a Self-Aligned Mask”, Extended Abstracts, 1995 Internatl. Conf. on Solid State Devices and Materials, Osaka, pp. 896-897.
Robinson Karl M.
Walker Michael A.
Hong William
Micro)n Technology, Inc.
Ostrager Allen M.
Wells St. John Roberts Gregory & Matkin
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