Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-08-27
2001-01-30
Luu, Matthew (Department: 2779)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000
Reexamination Certificate
active
06181314
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device, and more particularly to an output circuit relative to column lines of a column driver in an active matrix liquid crystal display device.
FIG. 7
shows an exemplary structure of an active matrix liquid crystal display device. In this diagram, a liquid crystal panel
102
is composed of liquid crystal cells (pixels)
101
arrayed to form a two-dimensional matrix, and a vertical (row) driver
103
for row selection and a horizontal (column) driver (column line driving circuit)
104
for column selection are provided in the periphery of the liquid crystal panel
102
.
As shown in
FIG. 8
, the horizontal driver
104
comprises a shift register
111
having a plurality of stages corresponding to the number n of column lines, a shift register controller
112
for controlling the shift register
111
, a sampling circuit
113
for sampling data on a data bus line in synchronism with sampling pulses outputted successively from the shift register
111
, a latch circuit
114
for holding the sampled data during one horizontal period, a DA converter
115
for converting the latch data into analog signal, and an output circuit
118
consisting of n output buffers
117
-
1
-
117
-n for driving the column lines
116
-
1
-
116
-n respectively.
In the related art output circuit of the above configuration, output ends of the output buffers
117
-
1
-
117
-n are connected directly to the column lines
116
-
1
-
116
-n, so that no problem is raised in particular if the output buffers
117
-
1
-
117
-n structurally have sufficient driving capability with regard to both input and output currents. However, there arise some problems in case the output buffers
117
-
1
-
117
-n are composed of source follower circuits for example and have sufficient driving capability merely in one direction.
If, even after charging a great load, the output ends of the output buffers
117
-
1
-
117
-n are still connected to the load until being reset to the initial state, then it follows that the output circuit needs to have a complete characteristic or a sufficient time for discharging the load. For example, in case each of the output buffers
117
-
1
-
117
-n consists of a source follower circuit, a power supply for the source follower circuit is required to furnish a current necessary for discharging the capacitive load, whereby the resultant power consumption is steadily rendered large.
Increasing the direct current value of the source follower circuit brings about reduction of the dynamic range, dimensional increase of the circuit area, and increase of output variations at the time of offset cancellation. This disadvantage raises an extremely serious problem when the output buffers
117
-
1
-
117
-n consist of source follower circuits each composed of a polysilicon TFT (thin film transistor), since the threshold voltage Vth of a polysilicon TFT is high and variation in such threshold voltage Vth is large.
Due to the reasons mentioned, it has been difficult heretofore to constitute the output circuit by the use of a unipolar output buffer. Similarly, even in the use of an output buffer having bidirectional current output capability like a push-pull buffer, there may occur a case where an unnecessary capacitive load is charged or discharged during the DA conversion period of the DA converter
115
and also during its precharge period. In such a case, therefore, some unnecessary power is consumed.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an improved output circuit in a liquid crystal display device where a power consumption is low and output potential variations are minimized.
According to one aspect of the present invention, there is provided a liquid crystal display device having output buffers corresponding to column lines. This display device comprises analog switches provided between output ends of the output buffers and the column lines respectively, and a switch controller for on-off controlling the analog switches. A DA converter is provided in the preceding stage of the output buffers, and the switch controller turns off the analog switches during a DA conversion period of the DA converter or during a precharge period prior to DA conversion, and turns on the analog switches during a predetermined period other than such periods.
In the liquid crystal display device of the above circuit configuration, the output buffers are disconnected from or connected to the column lines when the analog switches are turned off or turned on. Therefore, the output circuit can be separated from a capacitive load by disconnecting the output buffers from the column lines through turning off the analog switches during a DA conversion period of a DA converter provided in the preceding stage of the output circuit or during a precharge period prior to DA conversion, hence preventing increase of the output current of each output buffer while ensuring sufficient change of the signal potential.
According to another aspect of the present invention, there is provided a liquid crystal display device having a horizontal driver and a vertical driver. The horizontal driver comprises a shift register having a plurality of stages equal in number to columns; a shift register controller for controlling the shift register; a sampling circuit for sampling data on a data bus line in synchronism with sampling pulses outputted successively from the shift register; a latch circuit for holding the sampled data during one horizontal period; a DA converter for converting into analog signal the data held by the latch circuit; output buffers for driving column lines; and analog switches provided between the column lines and the output buffers. In this structure, the analog switches are on-off controlled by a switch controller.
REFERENCES:
patent: 4697154 (1987-09-01), Kousaka et al.
patent: 5061920 (1991-10-01), Nelson
patent: 5103218 (1992-04-01), Takeda
patent: 5196738 (1993-03-01), Takahara et al.
patent: 5739805 (1998-04-01), Dingwall
patent: 5900856 (1999-05-01), Iino et al.
patent: 5907314 (1999-11-01), Negishi et al.
patent: 5977940 (1999-11-01), Akiyama et al.
patent: 5995072 (1999-11-01), Nakajima
patent: 0510696 A1 (1992-10-01), None
patent: 0597315 A2 (1994-05-01), None
patent: 0657863 (1995-06-01), None
European Search Report dated Apr. 20, 2000.
“P-14: Low Output Offset, 8 bit Signal Drivers for XGA/SVGA TFT-LCDS”; I Minamizaki H et al; SID's International Display Research Conference; vol. Conf. 16, 1996, pp. 247-250.
Maekawa Toshikazu
Nakajima Yoshiharu
Blackman Anthony J.
Kananen Ronald P.
Luu Matthew
Rader Fishman & Grauer
Sony Corporation
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