Power supply monitoring integrated circuit device for...

Electricity: battery or capacitor charging or discharging – Serially connected batteries or cells

Reexamination Certificate

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Reexamination Certificate

active

06225779

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an integrated circuit device for monitoring power supply (hereafter a “power supply monitoring IC”) that is used to prevent a lithium-ion cell or the like from being brought into an overdischarged or overcharged state.
BACKGROUND ART
A conventional power supply monitoring IC will be described below with reference to FIG.
3
. In
FIG. 3
, reference numeral
72
represents a power supply apparatus (hereafter a “battery pack”) having lithium-ion cells
2
and
3
and a power supply monitoring IC
73
. When the cells
2
and
3
are charged, terminals
11
and
12
are connected to a power source for charging (not shown), and, when the battery pack
72
is in use, a load (not shown) is connected to the terminals
11
and
12
.
In normal use, the lithium-ion cells
2
and
3
each have a voltage from 2.3 V to 4.2 V. Accordingly, for example, the power supply monitoring IC
73
, when the voltage becomes higher than 4.3 V, inhibits charging to prevent overcharging, and, when the voltage becomes lower than 2.2 V, inhibits discharging to prevent overdischarging.
Now, the portion of this conventional power supply monitoring IC
73
that detects overdischarging will be described. The portion that detects overcharging will not be described; nor is it shown in FIG.
3
. Of the two lithium-ion cells
2
and
3
, the cell
2
is placed on the higher potential side. The higher potential end of the cell
2
is connected to the positive terminal
11
of the battery pack
72
. On the other hand, the lower potential end of the cell
3
is connected to the drain of an n-channel MOSFET (metal-oxide semiconductor field-effect transistor) 8. The source of the MOSFET
8
is connected to the negative terminal
12
. The gate of the MOSFET
8
is connected to a terminal T
1
of the power supply monitoring IC
73
, so that the MOSFET
8
is turned on and off by the power supply monitoring IC
73
.
The higher potential end of the cell
2
is connected through a protection resistor R
5
to a terminal U
1
of the power supply monitoring IC
73
. The node between the cells
2
and
3
is connected through a protection resistor R
6
to a terminal U
2
. The lower potential end of the cell
3
is connected to a terminal GND of the power supply monitoring IC
73
.
During discharging or charging, the power supply monitoring IC
73
turns on the MOSFET
8
so that electric power is supplied from the cells
2
and
3
to an electronic appliance or the like connected to the terminals
11
and
12
. On the other hand, during charging, a direct-current voltage is applied from a direct-current power source or the like to the terminals
11
and
12
, and thereby the cells
2
and
3
are charged.
The protection resistors R
5
and R
6
have a resistance of about 1k&OHgr; and serve to prevent infiltration of noise into the power supply monitoring IC
73
which may result in electrostatic destruction of the power supply monitoring IC
73
. Moreover, the protection resistors R
5
and R
6
also serve to protect the cells
2
and
3
from destruction by preventing the cells
2
and
3
from being short-circuited even when the terminal U
1
or U
2
is short-circuited to the terminal GND.
Between the terminals U
1
and U
2
, resistors R
1
and R
2
are connected in series. The voltage at the node between the resistors R
1
and R
2
is fed to the non-inverting input terminal (+) of a comparator
4
. To the inverting input terminal (−) of the comparator
4
, a voltage higher than the voltage at the terminal U
2
by a reference voltage V
1
is fed. The comparator
4
receives electric power via the terminal U
1
. Thus, the comparator
4
compares the voltage of the cell
2
with a predetermined overdischarge voltage. The overdischarge voltage is set, for example, at 2.2 V. The comparator
4
outputs a low level if the voltage of the cell
2
is lower than the overdischarge voltage, and outputs a high level if the voltage of the cell
2
is higher than the overdischarge voltage.
Between the terminals U
2
and GND, resistors R
3
and R
4
are connected in series. The voltage at the node between the resistors R
3
and R
4
is fed to the non-inverting input terminal (+) of a comparator
5
. The terminal GND is grounded so as to be at the ground level. To the inverting input terminal (−) of the comparator
5
, a voltage higher than the ground level by a reference voltage V
2
is fed. The resistances of the resistors R
1
and R
3
are equal, and the resistances of the resistors R
2
and R
4
are equal. The reference voltages V
1
and V
2
are equal. Thus, the voltages of the cells
2
and
3
are checked against the same overdischarge voltage.
The outputs of the comparators
4
and
5
are fed to an AND circuit
6
. Thus, when the voltages of both of the cells
2
and
3
are higher than the overdischarge voltage, the AND circuit
6
outputs a high level. By contrast, when the voltage of at least one of the cells
2
and
3
is lower than the overdischarge voltage, the AND circuit
6
outputs a low level. In this way, when the voltages of both of the cells
2
and
3
are higher than the overdischarge voltage, the AND circuit
6
outputs a high level that is used as a discharge enable signal SD. The discharge enable signal SD is fed to a discharge control circuit
7
.
While the discharge control circuit
7
is receiving the discharge enable signal SD, the discharge control circuit
7
applies a signal to the gate of the MOSFET
8
, which is connected to the terminal T
1
, to turn on the MOSFET
8
. By contrast, while the discharge control circuit
7
is not receiving the discharge enable signal SD, it keeps the MOSFET
8
off. As a result, the cells
2
and
3
are disconnected from the load, and thereby discharging is stopped. In this way, the cells
2
and
3
are prevented from being brought into an overdischarged state.
However, in this conventional power supply monitoring IC
73
, voltage drops are caused across external impedance, such as the protection resistors R
5
and R
6
and wiring resistances, by the current flowing therethrough, and this causes an error in the detected voltages of the cells
2
and
3
. Thus, variations in the current flowing into the power supply monitoring IC
73
and variations in external impedance degrade detection accuracy. For example, in the case of the comparator
5
, which receives electric power through the resistor R
6
, a variation in the voltage resulting from electric power being supplied appears at the voltage division point, and such a variation appearing at the voltage division point as a result of electric power being supplied is difficult to correct. Now suppose that the power supply monitoring IC
73
monitors the overdischarge voltage with accuracy of about 50 mV, that the current flowing through the resistor R
6
via the terminal U
2
as the operation current of the comparator
5
is tens of microamperes, and that the resistor R
6
has a resistance of 1 k&OHgr;, then a voltage drop of tens of microvolts occurs. In this way, variations in the resistances of the protection resistors, in wiring resistances, and in the operation current cause an error in detection accuracy as large as such a voltage drop, and thereby degrade detection accuracy. Furthermore, the current flowing through the resistors R
1
and R
2
in the upper stage flows also through the resistors R
3
and R
4
, and this also causes an error in the voltage at the voltage division point with respect to the voltage that should be present there.
Moreover, in case the resistor R
6
is disconnected from the terminal U
2
by an accidental cause such as improper soldering or a mechanical shock, the resistors R
1
to R
4
are left connected simply in series, and therefore the comparators
4
and
5
erroneously recognize the average voltage of the cells
2
and
3
as the voltages of the cells
2
and
3
, respectively. For example, if such a disconnection occurs at the terminal U
2
when the voltage of one of the cells
2
and
3
equals the overdischarge vo

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