Semiconductor flip chip ball grid array package

Details Semiconductor flip chip ball grid array package Semiconductor flip chip ball grid array package

1999-08-16

2001-07-24

Gaffin, Jeffrey (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S748000, C361S765000, C361S767000, C361S783000, C361S807000, C361S808000, C257S736000, C257S737000, C257S738000, C257S778000, C257S780000, C174S259000, C174S260000, C174S266000

Reexamination Certificate

active

06266249

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the packaging of semiconductor devices, and in particular to a chip scale flip chip package and a method for creating a chip scale flip chip package.
2. Description of the Related Art
The use of semiconductor devices, integrated circuits in particular, in portable electronic devices such as digital cell phones has grown strongly in recent years and that growth is projected to continue well into the foreseeable future. For such portable devices, it is highly desirable to have a packaged integrated circuit that is as small as possible so that the size of such devices may be commensurately decreased and/or to allow more components to be integrated within such devices. Indeed, the demand for chip scale packages, which are packages that have a cross sectional area that is not significantly larger than the cross sectional area of an integrated circuit, is expected to grow significantly over the next few years. The smaller size packages, however, must accommodate ever increasing lead counts for integrated circuits without sacrificing the packages' protective functions.
To meet the need for ever shrinking package sizes and ever growing lead counts, flip chip and ball grid array (BGA) technologies have become increasingly popular. Flip chip relates to the attachment of an integrated circuit to a substrate while BGA relates to the attachment of a substrate to a printed circuit board or the like. Flip chip BGA packages (FCBGA), which combine the two technologies, are relatively small and have relatively high lead counts.
According to one conventional method for creating FCBGA packages, solder bumps are affixed to an integrated circuit, the integrated circuit is attached to one side of a substrate, underfill is then dispensed between gaps between the integrated circuit and the substrate and then cured, and solder balls are then attached to the other side of the substrate. The first step, affixing ball-shaped beads or bumps of solder to the integrated circuit's bonding pads, is typically performed before a wafer is diced into individual die and therefore before individual die are tested. Thus, for those die that turn out to be defective, the step of affixing the solder balls to that die has been wasted. It would be desirable to avoid spending time providing packaging for defective die.
After the solder balls have been affixed, the die is then “flipped” such that the solder bumps are brought into contact with corresponding conductive traces on a packaging substrate. The solder balls are then reflowed to connect the integrated circuit to the substrate. The first steps, affixing solder balls, “flipping” and then reflowing, as described above, are relatively time consuming. Further, relatively expensive machinery is required to perform these steps.
The next step, dispensing and curing underfill, is also relatively complex and time consuming. An underfill materially, typically a thermo-set epoxy, is dispensed in the gap between an integrated circuit and a substrate. The epoxy is then cured by heating the substrate and integrated circuit to an appropriate curing temperature. The assembly is then cooled down. The heating and cooling steps take a relatively long time to perform and also subject the integrated circuit to the stresses and strains associated with changing the temperature of a material.
It is desirable to improve upon conventional methods for assembling FCBGA packages. In particular, it is desirable to reduce the time required to assemble a FCBGA and to reduce the need for relatively expensive equipment required by certain conventional FCBGA packaging methods.
SUMMARY OF THE INVENTION
These and other needs are met by a package for mounting a semiconductor device to a circuit board according to the present invention. In a preferred embodiment, the package comprises a substrate with a top surface and a bottom surface, the substrate having a plurality of electrically conductive vias extending from the top surface of the substrate to the bottom surface of the substrate. A semiconductor device, having an active surface, the active surface having a plurality of bonding pads, is attached to the substrate by an adhesive that has holes that align with the vias. The vias are also aligned with the bonding pads. Solder serves to electrically couple each of the bonding pads with a corresponding via Each of the vias, in turn, is coupled to a solder ball formed on the bottom of the substrate.
In the preferred embodiment, the package described above is created according to the following method. An interposer panel comprising a plurality of chicklets is created, each of the chicklets comprising a substrate and adhesive as described above. Each of a plurality of integrated circuits is placed on the top surface of one of the chicklets. The adhesive is then cured. A solder mask is applied to the bottom surface of each of the plurality of chicklets and solder is then applied to each of the solder masks. The solder is then reflowed, which simultaneously results in the electrical coupling of bonding pads of the plurality of integrated circuits with the vias and the formation of solder balls on the bottom surface of each of the plurality of chicklets. Finally, the interposer panel is diced to create individual packaged integrated circuits.


REFERENCES:
patent: 5535101 (1996-07-01), Miles et al.
patent: 5637920 (1997-06-01), Loo
patent: 5854534 (1998-12-01), Beilin et al.
patent: 6015955 (2000-01-01), Farooq et al.
patent: 6037044 (2000-03-01), Giri et al.
patent: 6052287 (2000-04-01), Palmer et al.
patent: 6064114 (2000-05-01), Higgins, III
patent: 6097089 (2000-08-01), Gaku et al.
patent: 6097609 (2000-08-01), Kabadi
patent: 6162997 (2000-12-01), Memis

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