Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2000-01-31
2001-05-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C428S218000
Reexamination Certificate
active
06239000
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a semiconductor technology, and particularly to a method of forming an isolation structure.
2. Description of Related Art
Implementing electric circuits involves connecting isolated devices through specific paths. When fabricating silicon integrated circuits it must therefore be possible to isolate devices into the substrate from one another. These devices can subsequently be interconnected to create the specific circuit configurations desired. From this perspective, isolation technology is one of the critical aspects of fabricating integrated circuits.
A variety of techniques have been developed to isolate devices in integrated circuits. One reason is that different types of devices (e.g., high voltage devices and low voltage devices) have different isolation requirements. respectively. However, conventional technologies have the following drawbacks:
(1) The isolation field implant of a field oxide has a junction depth shallower than the well of a trench oxide, and has a light ion concentration, thereby having an unsatisfied isolating capability.
(2) A trench oxide has a well isolating devices better than the above field oxide well does, it is still not deep enough.
For this or other reasons, there is a need for a method to fabricate an isolation structure which satisfies those different requirements.
SUMMARY OF THE INVENTION
It is an object of this invention to provide a method of forming an isolation structure satisfies the need identified in the background section.
Other objects and advantages of this invention will become apparent to those of ordinary skill in the art having reference to the following specification in conjunction the drawings.
The present invention is directed to a method of forming an isolation structure. A substrate, for example, n-type substrate is provided. A first p-well is formed in and on the substrate. Two field oxides are formed spaced from each other over the p-well. A second p-well is formed in and on the first p-well, wherein the second p-well substantially surrounds the field oxides in the first p-well. A trench isolation is formed in and on the first p-well and between the field oxides, wherein the trench isolation is substantially deeper than the second p-well. A third p-well substantially surrounding the trench isolation in the first p-well.
In one preferred embodiment according to the present invention, the first p-well, the second p-well and the third p-well have ion concentrations of about 2E15-5E16 cm
−3
, 8E15-5E17 cm
−3
and 6E16-8E17 cm
−3
, respectively. Moreover, the formation of the second p-well preferably comprises forming a patterned nitride layer over the substrate, and then implanting second p-type ions by using the patterned nitride layer as a mask to form a second p-well in and on the first p-well, followed by removing the patterned nitride layer.
This present invention advantageously provides a first p-well to be served as a deep well junction isolation of an isolation region, and provides a second and a third p-wells which are more concentrated than the first p-well to be served as a junction isolation effectively isolating high voltage devices.
REFERENCES:
patent: 5716886 (1998-02-01), Wen
patent: 6140193 (2000-10-01), Tung
Hoang Quoc
Nelms David
United Microelectronics Corp.
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